forked from ~ljy/RK3588_XEN

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2024-11-01 2f529f9b558ca1c1bd74be7437a84e4711743404 
 kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi
....@@ -27,7 +27,7 @@
2727 	};
2828 
2929 	es8316_sound: es8316-sound {
30
-		status = "okay";
30
+		status = "disabled";
3131 		compatible = "rockchip,multicodecs-card";
3232 		rockchip,card-name = "rockchip-es8316";
3333 		rockchip,format = "i2s";
....@@ -128,14 +128,14 @@
128128 		 * - PDN (power down when low)
129129 		 */
130130 		post-power-on-delay-ms = <200>;
131
-		reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;  //WIFI_REG_ON_H
131
+		reset-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;  //BT_DISABLE_GPIO1_C6_d_1V8
132132 	};
133133 
134134 	rk_headset: rk-headset {
135135 		status = "okay";
136136 		compatible = "rockchip_headset";
137
-		headset_gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
138
-		spk_ctl_gpio  = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
137
+		headset_gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;//HP_DET_L_GPIO3_D5_d_3V3
138
+		spk_ctl_gpio  = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;//SPK_CTL_GPIO4_B4_u_3V3
139139 		pinctrl-names = "default";
140140 		pinctrl-0 = <&hp_det>;
141141 		io-channels = <&saradc 3>;
....@@ -159,20 +159,9 @@
159159 		regulator-boot-on;
160160 		enable-active-high;
161161 		//gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
162
-		gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
162
+		gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
163163 		vin-supply = <&vcc_1v8_s0>;
164164 	};
165
-
166
-	 vcc3v3_lcd1_n: vcc3v3-lcd1-n {
167
-        compatible = "regulator-fixed";
168
-        regulator-name = "vcc3v3_lcd1_n";
169
-        regulator-boot-on;
170
-        regulator-min-microvolt = <3300000>;
171
-        regulator-max-microvolt = <3300000>;
172
-        enable-active-high;
173
-        gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
174
-    };
175
-
176165 
177166 	vcc3v3_pcie30: vcc3v3-pcie30 {
178167 		compatible = "regulator-fixed";
....@@ -228,9 +217,9 @@
228217 */
229218 	vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
230219 		compatible = "regulator-fixed";
231
-		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
232
-		pinctrl-names = "default";
233
-		pinctrl-0 = <&sd_s0_pwr>;
220
+		//gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
221
+		//pinctrl-names = "default";
222
+		//pinctrl-0 = <&sd_s0_pwr>;
234223 		regulator-name = "vcc_3v3_sd_s0";
235224 		enable-active-high;
236225 	};
....@@ -241,80 +230,38 @@
241230 		clock-names = "ext_clock";
242231 		uart_rts_gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; //UART9_RTSn_M0_BT
243232 		pinctrl-names = "default", "rts_gpio";
244
-		pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
233
+		pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>;
245234 		pinctrl-1 = <&uart9_gpios>;
246
-		BT,reset_gpio    = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; //BT_REG_ON_H
247
-		BT,wake_gpio     = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
248
-		BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
249
-		status = "okay";
235
+		BT,reset_gpio    = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //BT_DISABLE_GPIO0_B2_u_1V8
236
+		//BT,wake_gpio     = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
237
+		//BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
238
+		status = "disabled";
250239 	};
251240 
252241 	wireless_wlan: wireless-wlan {
253242 		compatible = "wlan-platdata";
254243 		wifi_chip_type = "ap6398s";
255
-		pinctrl-names = "default";
256
-		pinctrl-0 = <&wifi_host_wake_irq>;
257
-		WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //WIFI_WAKE_HOST_H
244
+	//	pinctrl-names = "default";
245
+	//	pinctrl-0 = <&wifi_host_wake_irq>;
246
+	//	WIFI,host_wake_irq = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; //GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
258247 	//	WIFI,poweren_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
259
-		status = "okay";
248
+		status = "disabled";
260249 	};
261250 	
262251 	ndj_io_init {
263252            	compatible = "nk_io_control";
264253 			pinctrl-names = "default";
265254           	pinctrl-0 = <&ndj_io_gpio>;
266
-						
267
-//			vcc_5v {
268
-//				gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
269
-//				gpio_function = <0>;
270
-//			};
271
-			
272
-			vcc_12v {
273
-				gpio_num = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
274
-				gpio_function = <0>;
275
-			};
276
-			
277
-			vcc_3v {
278
-				gpio_num = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
279
-				gpio_function = <0>;
280
-			};
255
+									
256
+
281257 			
282258            	hub_5V_reset {
283
-				gpio_num = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
259
+				gpio_num = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 
284260 				gpio_function = <3>;
285
-			};
261
+			};//HUB_RESET_GPIO4_B6_d_3V3
286262 			
287
-			4g_power {
288
-				gpio_num = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
289
-				gpio_function = <0>;
290
-			};
291263 			
292
-           	wake_4g {
293
-				gpio_num = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
294
-				gpio_function = <0>;
295
-			};
296264 			
297
-			air_mode_4g {
298
-				gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
299
-				gpio_function = <0>;
300
-			};			
301
-			
302
-			reset_4g {
303
-				gpio_num = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
304
-				gpio_function = <3>;
305
-			};	
306
-/*
307
-			spk_ctl {
308
-				gpio_num = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
309
-				gpio_function = <0>;
310
-			};
311
-			
312
-			hp_det
313
-			 {
314
-				gpio_num = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
315
-				gpio_function = <1>;
316
-			};
317
-*/
318265 		};
319266 		
320267 		
....@@ -322,11 +269,11 @@
322269                compatible = "simple-panel";
323270                backlight = <&backlight>;
324271                power-supply = <&vcc3v3_lcd_n>;
325
-			   vcc-5v-gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;			   
326
-               enable-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //LCD_VDD_EN
327
-               reset-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; //CH7511_RESET_N_1V8
328
-               edp-bl-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;  //LCD_BLK-PWR_EN
329
-               edp-bl-en = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD_BKL_EN_GPIO3_D4_d_3V3
272
+			   vcc-5v-gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;	//VCC5_IO_EN_GPIO4_B5_d_3V3		   
273
+               enable-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //LCD_VDD_EN_GPIO3_C6_u_3V3
274
+               reset-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; //CH7511_RESET_N_1V8
275
+               edp-bl-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;  //LCD_BKL_PWM3_3V3
276
+               edp-bl-en = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; //LCD_BKL_EN_GPIO3_A6_d_3V3
330277                bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
331278                bpc = <8>;
332279                prepare-delay-ms = <200>;
....@@ -393,13 +340,13 @@
393340 };
394341 
395342 &backlight {
396
-	pwms = <&pwm10 0 25000 0>;
343
+	pwms = <&pwm3 0 25000 0>;
397344 	status = "okay";
398345 };
399346 
400347 &backlight1 {
401348 	pwms = <&pwm11 0 25000 0>;
402
-	status = "okay";
349
+	status = "disabled";
403350 };
404351 
405352 &combphy0_ps {
....@@ -448,11 +395,11 @@
448395  * when dsi0 is enabled
449396  */
450397 &mipi_dcphy0 {
451
-	status = "okay";
398
+	status = "disabled";
452399 }; 
453400  
454401 &dsi0 {
455
-	status = "okay";
402
+	status = "disabled";
456403 };
457404 
458405 &dsi0_in_vp2 {
....@@ -460,16 +407,7 @@
460407 };
461408 
462409 &dsi0_in_vp3 {
463
-	status = "okay";
464
-};
465
-
466
-&dsi0_panel {
467
-	power-supply = <&vcc3v3_lcd1_n>;  //LCD_PWREN_H
468
-	vcc-5v-gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
469
-	reset-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;  //MIPIDIS_RST_GPIO1_A0_d_1V8
470
-	vddio-mipi = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //MIPIDIS_PWR_EN_1V8
471
-	pinctrl-names = "default";
472
-	pinctrl-0 = <&lcd_rst_gpio>;
410
+	status = "disabled";
473411 };
474412 
475413 /*
....@@ -502,6 +440,31 @@
502440 	//pinctrl-0 = <&lcd_rst_gpio>;
503441 };
504442 
443
+&gmac0 {
444
+	/* Use rgmii-rxid mode to disable rx delay inside Soc */
445
+	phy-mode = "rgmii-rxid";
446
+	clock_in_out = "output";
447
+
448
+	snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
449
+	snps,reset-active-low;
450
+	/* Reset time is 20ms, 100ms for rtl8211f */
451
+	snps,reset-delays-us = <0 20000 100000>;
452
+
453
+	pinctrl-names = "default";
454
+	pinctrl-0 = <&gmac0_miim
455
+                     &gmac0_tx_bus2
456
+                     &gmac0_rx_bus2
457
+                     &gmac0_rgmii_clk
458
+                     &gmac0_rgmii_bus
459
+                     &eth0_pins
460
+		     &gmac0_clkinout>;
461
+	tx_delay = <0x44>;
462
+	/* rx_delay = <0x4f>; */
463
+
464
+	phy-handle = <&rgmii_phy0>;
465
+	status = "okay";
466
+};
467
+
505468 &gmac1 {
506469 	/* Use rgmii-rxid mode to disable rx delay inside Soc */
507470 	phy-mode = "rgmii-rxid";
....@@ -522,8 +485,8 @@
522485 	tx_delay = <0x43>;
523486 	/* rx_delay = <0x3f>; */
524487 
525
-	phy-handle = <&rgmii_phy>;
526
-	status = "disabled";
488
+	phy-handle = <&rgmii_phy1>;
489
+	status = "okay";
527490 };
528491 
529492 &hdmi0 {
....@@ -559,7 +522,7 @@
559522 	#sound-dai-cells = <1>;
560523 	/* Effective level used to trigger HPD: 0-low, 1-high */
561524 	hpd-trigger-level = <1>;
562
-	hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
525
+	hdmirx-det-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
563526 	pinctrl-names = "default";
564527 	pinctrl-0 = <&hdmim1_rx &hdmirx_det>;
565528 };
....@@ -854,12 +817,18 @@
854817 };
855818 
856819 &mdio1 {
857
-	rgmii_phy: phy@1 {
820
+	rgmii_phy1: phy@1 {
858821 		compatible = "ethernet-phy-ieee802.3-c22";
859822 		reg = <0x1>;
860823 	};
861824 };
862825 
826
+&mdio0 {
827
+	rgmii_phy0: phy@1 {
828
+		compatible = "ethernet-phy-ieee802.3-c22";
829
+		reg = <0x1>;
830
+	};
831
+};
863832 
864833 
865834 &mipi_dcphy1 {
....@@ -868,21 +837,21 @@
868837 
869838 &pcie2x1l2 {
870839 	phys = <&combphy0_ps PHY_TYPE_PCIE>;
871
-	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
840
+	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
872841 	vpcie3v3-supply = <&vcc3v3_pcie30>;
873842 	status = "okay";
874843 };//MINIPCIE
875844 
876845 &pcie2x1l1 {
877846 	phys = <&combphy2_psu PHY_TYPE_PCIE>;
878
-	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
847
+	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;//PCIEX1_1_PERSTn_M1_L
879848 	vpcie3v3-supply = <&vcc3v3_pcie30>;
880849 	status = "okay";
881850 };//M.2 WIFI6
882851 
883852 &pcie2x1l0 {
884853 	phys = <&combphy1_ps PHY_TYPE_PCIE>;
885
-	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
854
+	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;  //PCIEx1_0_PERSTn_M1_L
886855 	vpcie3v3-supply = <&vcc3v3_pcie30>;
887856 	status = "okay";
888857 };//RTL8111H
....@@ -927,17 +896,17 @@
927896 
928897 	hdmi {
929898 		hdmirx_det: hdmirx-det {
930
-			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
899
+			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
931900 		};
932901 	};
933902 
934903 	headphone {
935904 		hp_det: hp-det {
936
-			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
905
+			rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
937906 		};
938907 		
939908 		spk_con: spk-con {
940
-			rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
909
+			rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
941910 		};
942911 	};
943912 
....@@ -961,16 +930,16 @@
961930 
962931 	sdio-pwrseq {
963932 		wifi_enable_h: wifi-enable-h {
964
-			rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
933
+			rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
965934 		};
966935 	};
967
-
936
+/*
968937 	sdmmc {
969938 		sd_s0_pwr: sd-s0-pwr {
970939 			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
971940 		};
972941 	};
973
-
942
+*/
974943 	touch {
975944 		touch_gpio: touch-gpio {
976945 			rockchip,pins =
....@@ -992,55 +961,32 @@
992961 		};
993962 
994963 		bt_reset_gpio: bt-reset-gpio {
995
-			rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
996
-		};
997
-
998
-		bt_wake_gpio: bt-wake-gpio {
999
-			rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
1000
-		};
1001
-
1002
-		bt_irq_gpio: bt-irq-gpio {
1003
-			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
964
+			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
1004965 		};
1005966 	};
1006
-
967
+/*
1007968 	wireless-wlan {
1008969 		wifi_host_wake_irq: wifi-host-wake-irq {
1009
-			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
970
+			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
1010971 		};
1011972 	};
1012
-	
973
+*/	
1013974 	
1014975 	ndj_io_init{
1015976 		ndj_io_gpio: ndj_io_gpio_col{
1016977 				rockchip,pins =
1017
-					<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
1018
-					<0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,
1019
-					<4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,
1020
-					<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
1021
-					<2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
1022
-					<2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,
1023
-					<2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,
1024
-					<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,  //vcc_5v
1025
-					<4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO4_B5_d_3V3
1026
-					<4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO4_B6_d_3V3
1027
-					<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B0_u_3V3
1028
-					<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B2_d_3V3
1029
-					<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B3_u_3V3
1030
-					<3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_B4_u_3V3
1031
-					<3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>,  //GPIO3_A7_u_3V3
1032
-					<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;  //GPIO3_A0_u_3V3
1033
-
978
+				
979
+					<1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;  //SPI4_CS0_M2_1V8  35		 		
1034980 		};
1035981 	};
1036982 };
1037983 &pwm3 {
1038
-	pinctrl-0 = <&pwm3m1_pins>;
1039984 	status = "okay";
985
+	pinctrl-0 = <&pwm3m1_pins>;
1040986 };
1041987 
1042988 &route_dsi0 {
1043
-	status = "okay";
989
+	status = "disabled";
1044990 	connect = <&vp3_out_dsi0>;
1045991 };
1046992 
....@@ -1050,12 +996,12 @@
1050996 };
1051997 
1052998 &pwm10 {
1053
-	status = "okay";
999
+	status = "disabled";
10541000 	pinctrl-0 = <&pwm10m2_pins>;
10551001 };
10561002 
10571003 &pwm11 {
1058
-	status = "okay";
1004
+	status = "disabled";
10591005 	pinctrl-0 = <&pwm11m3_pins>;
10601006 };
10611007 
....@@ -1069,6 +1015,10 @@
10691015 
10701016 &sata0 {
10711017 	status = "disabled";
1018
+};
1019
+
1020
+&sata2 {
1021
+	status = "okay";
10721022 };
10731023 
10741024 &sdio {
....@@ -1085,7 +1035,7 @@
10851035 	pinctrl-names = "default";
10861036 	pinctrl-0 = <&sdiom0_pins>;
10871037 	sd-uhs-sdr104;
1088
-	status = "okay";
1038
+	status = "disabled";
10891039 };
10901040 
10911041 &sdmmc {
....@@ -1145,21 +1095,21 @@
11451095 #endif
11461096 
11471097 &uart1 {
1148
-	status = "okay";
1098
+	status = "disabled";
11491099 //	dma-names = "tx", "rx"; //ʹÓÃdma´«Êäģʽ
11501100 	pinctrl-names = "default";
11511101 	pinctrl-0 = <&uart1m0_xfer>;
11521102 };
11531103 
11541104 &uart3 {
1155
-	status = "okay";
1105
+	status = "disabled";
11561106 	pinctrl-names = "default";
11571107 	pinctrl-0 = <&uart3m1_xfer>;
11581108 };
11591109 
11601110 
11611111 &uart4 {
1162
-	status = "okay";
1112
+	status = "disabled";
11631113 	pinctrl-names = "default";
11641114 	pinctrl-0 = <&uart4m0_xfer>;
11651115 };
....@@ -1177,20 +1127,34 @@
11771127 };
11781128 
11791129 &uart7 {
1180
-	status = "okay";
1130
+	status = "disabled";
11811131 	pinctrl-names = "default";
11821132 	pinctrl-0 = <&uart7m1_xfer>;
11831133 };
11841134 
11851135 &uart8 {
1186
-	status = "okay";
1136
+	status = "disabled";
11871137 	pinctrl-names = "default";
11881138 	pinctrl-0 = <&uart8m1_xfer>;
11891139 };
11901140 
11911141 
11921142 &uart9 {
1193
-	status = "okay";
1143
+	status = "disabled";
11941144 	pinctrl-names = "default";
11951145 	pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;	
11961146 };
1147
+
1148
+
1149
+&can0 {
1150
+	status = "okay";
1151
+	pinctrl-names = "default";
1152
+	pinctrl-0 = <&can0m0_pins>;
1153
+};
1154
+
1155
+
1156
+&can1 {
1157
+	status = "okay";
1158
+	pinctrl-names = "default";
1159
+	pinctrl-0 = <&can1m1_pins>;
1160
+};