add xenomai

hc

2024-11-01 2f529f9b558ca1c1bd74be7437a84e4711743404

 kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi
..
..
@@ -27,7 +27,7 @@
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 	};
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 	es8316_sound: es8316-sound {
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-		status = "okay";
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+		status = "disabled";
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 		compatible = "rockchip,multicodecs-card";
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 		rockchip,card-name = "rockchip-es8316";
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 		rockchip,format = "i2s";
..
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@@ -235,7 +235,7 @@
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 		BT,reset_gpio    = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //BT_DISABLE_GPIO0_B2_u_1V8
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 		//BT,wake_gpio     = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
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 		//BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
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-		status = "okay";
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+		status = "disabled";
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 	};
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 	wireless_wlan: wireless-wlan {
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@@ -245,7 +245,7 @@
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 	//	pinctrl-0 = <&wifi_host_wake_irq>;
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 	//	WIFI,host_wake_irq = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; //GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
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 	//	WIFI,poweren_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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-		status = "okay";
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+		status = "disabled";
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 	};
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 	ndj_io_init {
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@@ -253,45 +253,13 @@
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 			pinctrl-names = "default";
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           	pinctrl-0 = <&ndj_io_gpio>;
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-			vcc_12v {
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-				gpio_num = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
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-				gpio_function = <0>;
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-			};//VCC12_IO_EN_GPIO0_D3_u_3V3
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-			
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-			vcc_3v {
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-				gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
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-				gpio_function = <0>;
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-			};//VCC3_IO_EN_GPIO4_A1_d_3V3
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+
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            	hub_5V_reset {
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 				gpio_num = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 
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 				gpio_function = <3>;
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 			};//HUB_RESET_GPIO4_B6_d_3V3
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-			4g_power {
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-				gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
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-				gpio_function = <0>;
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-			};//4G_PWREN_GPIO3_C7_u_3V3
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-			
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-			5g_power {
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-				gpio_num =<&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
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-				gpio_function = <0>;
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-			};
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-			
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-         	wake_wifi_bt {
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-				gpio_num = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
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-				gpio_function = <0>;
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-			};//GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
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-			
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-			air_mode_4g {
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-				gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
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-				gpio_function = <0>;
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-			};	//GPIO2_B4_u_1V8_4G_AIR_MODE_IN		
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-			
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-			reset_4g {
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-				gpio_num = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
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-				gpio_function = <3>;
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-			};	//GPIO2_C3_d_1V8_4G_RESET_N_IN
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 		};
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@@ -439,7 +407,7 @@
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 };
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 &dsi0_in_vp3 {
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-	status = "okay";
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+	status = "disabled";
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 };
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 /*
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@@ -472,6 +440,31 @@
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 	//pinctrl-0 = <&lcd_rst_gpio>;
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 };
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+&gmac0 {
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+	/* Use rgmii-rxid mode to disable rx delay inside Soc */
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+	phy-mode = "rgmii-rxid";
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+	clock_in_out = "output";
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+
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+	snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
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+	snps,reset-active-low;
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+	/* Reset time is 20ms, 100ms for rtl8211f */
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+	snps,reset-delays-us = <0 20000 100000>;
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+
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+	pinctrl-names = "default";
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+	pinctrl-0 = <&gmac0_miim
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+                     &gmac0_tx_bus2
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+                     &gmac0_rx_bus2
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+                     &gmac0_rgmii_clk
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+                     &gmac0_rgmii_bus
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+                     &eth0_pins
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+		     &gmac0_clkinout>;
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+	tx_delay = <0x44>;
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+	/* rx_delay = <0x4f>; */
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+
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+	phy-handle = <&rgmii_phy0>;
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+	status = "okay";
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+};
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+
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 &gmac1 {
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 	/* Use rgmii-rxid mode to disable rx delay inside Soc */
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 	phy-mode = "rgmii-rxid";
..
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@@ -492,7 +485,7 @@
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 	tx_delay = <0x43>;
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 	/* rx_delay = <0x3f>; */
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-	phy-handle = <&rgmii_phy>;
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+	phy-handle = <&rgmii_phy1>;
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 	status = "okay";
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 };
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..
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@@ -524,7 +517,7 @@
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 /* Should work with at least 128MB cma reserved above. */
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 &hdmirx_ctrler {
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-	status = "okay";
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+	status = "disabled";
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 	#sound-dai-cells = <1>;
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 	/* Effective level used to trigger HPD: 0-low, 1-high */
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@@ -824,12 +817,18 @@
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 };
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 &mdio1 {
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-	rgmii_phy: phy@1 {
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+	rgmii_phy1: phy@1 {
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 		compatible = "ethernet-phy-ieee802.3-c22";
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 		reg = <0x1>;
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 	};
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 };
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+&mdio0 {
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+	rgmii_phy0: phy@1 {
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+		compatible = "ethernet-phy-ieee802.3-c22";
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+		reg = <0x1>;
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+	};
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+};
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 &mipi_dcphy1 {
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@@ -838,7 +837,7 @@
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 &pcie2x1l2 {
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 	phys = <&combphy0_ps PHY_TYPE_PCIE>;
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-	reset-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
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+	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
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 	vpcie3v3-supply = <&vcc3v3_pcie30>;
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 	status = "okay";
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 };//MINIPCIE
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@@ -847,7 +846,7 @@
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 	phys = <&combphy2_psu PHY_TYPE_PCIE>;
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 	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;//PCIEX1_1_PERSTn_M1_L
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 	vpcie3v3-supply = <&vcc3v3_pcie30>;
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-	status = "disabled";
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+	status = "okay";
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 };//M.2 WIFI6
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 &pcie2x1l0 {
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@@ -976,20 +975,7 @@
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 	ndj_io_init{
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 		ndj_io_gpio: ndj_io_gpio_col{
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 				rockchip,pins =
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-					<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
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-					<4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>,
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-					<4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
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-					<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>,
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-					<2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,
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-					<2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,
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-					<4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,  //vcc_5v				
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-					<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI0_MISO_M2_1V8 41
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-					<1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI4_MISO_M2_1V8 32
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-					<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI0_MOSI_M2_3V3 42
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-					<1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI4_MOSI_M2_1V8 33
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-					<1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI0_CLK_M2_1V8  43 
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-					<1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI4_CLK_M2_1V8  34
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-					<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,  //SPI0_CS0_M2_1V8  44
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+				
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 					<1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;  //SPI4_CS0_M2_1V8  35		 		
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 		};
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 	};
..
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@@ -1049,7 +1035,7 @@
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&sdiom0_pins>;
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 	sd-uhs-sdr104;
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-	status = "okay";
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+	status = "disabled";
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 };
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 &sdmmc {
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@@ -1109,7 +1095,7 @@
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 #endif
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 &uart1 {
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-	status = "okay";
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+	status = "disabled";
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 //	dma-names = "tx", "rx"; //ʹÓÃdma´«Êäģʽ
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&uart1m0_xfer>;
..
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@@ -1123,7 +1109,7 @@
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 &uart4 {
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-	status = "okay";
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+	status = "disabled";
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&uart4m0_xfer>;
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 };
..
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@@ -1141,7 +1127,7 @@
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 };
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 &uart7 {
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-	status = "okay";
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+	status = "disabled";
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&uart7m1_xfer>;
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 };
..
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@@ -1154,7 +1140,7 @@
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 &uart9 {
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-	status = "okay";
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+	status = "disabled";
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;	
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 };