hc
2024-11-01 2f529f9b558ca1c1bd74be7437a84e4711743404
kernel/arch/arm/include/asm/irqflags.h
....@@ -5,6 +5,7 @@
55 #ifdef __KERNEL__
66
77 #include <asm/ptrace.h>
8
+#include <asm/barrier.h>
89
910 /*
1011 * CPU interrupt mask handling.
....@@ -13,41 +14,44 @@
1314 #define IRQMASK_REG_NAME_R "primask"
1415 #define IRQMASK_REG_NAME_W "primask"
1516 #define IRQMASK_I_BIT 1
17
+#define IRQMASK_I_POS 0
1618 #else
1719 #define IRQMASK_REG_NAME_R "cpsr"
1820 #define IRQMASK_REG_NAME_W "cpsr_c"
1921 #define IRQMASK_I_BIT PSR_I_BIT
22
+#define IRQMASK_I_POS 7
2023 #endif
24
+#define IRQMASK_i_POS 31
2125
2226 #if __LINUX_ARM_ARCH__ >= 6
2327
2428 #define arch_local_irq_save arch_local_irq_save
25
-static inline unsigned long arch_local_irq_save(void)
29
+static inline unsigned long native_irq_save(void)
2630 {
2731 unsigned long flags;
2832
2933 asm volatile(
30
- " mrs %0, " IRQMASK_REG_NAME_R " @ arch_local_irq_save\n"
34
+ " mrs %0, " IRQMASK_REG_NAME_R " @ native_irq_save\n"
3135 " cpsid i"
3236 : "=r" (flags) : : "memory", "cc");
3337 return flags;
3438 }
3539
3640 #define arch_local_irq_enable arch_local_irq_enable
37
-static inline void arch_local_irq_enable(void)
41
+static inline void native_irq_enable(void)
3842 {
3943 asm volatile(
40
- " cpsie i @ arch_local_irq_enable"
44
+ " cpsie i @ native_irq_enable"
4145 :
4246 :
4347 : "memory", "cc");
4448 }
4549
4650 #define arch_local_irq_disable arch_local_irq_disable
47
-static inline void arch_local_irq_disable(void)
51
+static inline void native_irq_disable(void)
4852 {
4953 asm volatile(
50
- " cpsid i @ arch_local_irq_disable"
54
+ " cpsid i @ native_irq_disable"
5155 :
5256 :
5357 : "memory", "cc");
....@@ -69,12 +73,12 @@
6973 * Save the current interrupt enable state & disable IRQs
7074 */
7175 #define arch_local_irq_save arch_local_irq_save
72
-static inline unsigned long arch_local_irq_save(void)
76
+static inline unsigned long native_irq_save(void)
7377 {
7478 unsigned long flags, temp;
7579
7680 asm volatile(
77
- " mrs %0, cpsr @ arch_local_irq_save\n"
81
+ " mrs %0, cpsr @ native_irq_save\n"
7882 " orr %1, %0, #128\n"
7983 " msr cpsr_c, %1"
8084 : "=r" (flags), "=r" (temp)
....@@ -87,11 +91,11 @@
8791 * Enable IRQs
8892 */
8993 #define arch_local_irq_enable arch_local_irq_enable
90
-static inline void arch_local_irq_enable(void)
94
+static inline void native_irq_enable(void)
9195 {
9296 unsigned long temp;
9397 asm volatile(
94
- " mrs %0, cpsr @ arch_local_irq_enable\n"
98
+ " mrs %0, cpsr @ native_irq_enable\n"
9599 " bic %0, %0, #128\n"
96100 " msr cpsr_c, %0"
97101 : "=r" (temp)
....@@ -103,11 +107,11 @@
103107 * Disable IRQs
104108 */
105109 #define arch_local_irq_disable arch_local_irq_disable
106
-static inline void arch_local_irq_disable(void)
110
+static inline void native_irq_disable(void)
107111 {
108112 unsigned long temp;
109113 asm volatile(
110
- " mrs %0, cpsr @ arch_local_irq_disable\n"
114
+ " mrs %0, cpsr @ native_irq_disable\n"
111115 " orr %0, %0, #128\n"
112116 " msr cpsr_c, %0"
113117 : "=r" (temp)
....@@ -149,15 +153,22 @@
149153 #define local_abt_disable() do { } while (0)
150154 #endif
151155
156
+static inline void native_irq_sync(void)
157
+{
158
+ native_irq_enable();
159
+ isb();
160
+ native_irq_disable();
161
+}
162
+
152163 /*
153164 * Save the current interrupt enable state.
154165 */
155166 #define arch_local_save_flags arch_local_save_flags
156
-static inline unsigned long arch_local_save_flags(void)
167
+static inline unsigned long native_save_flags(void)
157168 {
158169 unsigned long flags;
159170 asm volatile(
160
- " mrs %0, " IRQMASK_REG_NAME_R " @ local_save_flags"
171
+ " mrs %0, " IRQMASK_REG_NAME_R " @ native_save_flags"
161172 : "=r" (flags) : : "memory", "cc");
162173 return flags;
163174 }
....@@ -166,21 +177,28 @@
166177 * restore saved IRQ & FIQ state
167178 */
168179 #define arch_local_irq_restore arch_local_irq_restore
169
-static inline void arch_local_irq_restore(unsigned long flags)
180
+static inline void native_irq_restore(unsigned long flags)
170181 {
171182 asm volatile(
172
- " msr " IRQMASK_REG_NAME_W ", %0 @ local_irq_restore"
183
+ " msr " IRQMASK_REG_NAME_W ", %0 @ native_irq_restore"
173184 :
174185 : "r" (flags)
175186 : "memory", "cc");
176187 }
177188
178189 #define arch_irqs_disabled_flags arch_irqs_disabled_flags
179
-static inline int arch_irqs_disabled_flags(unsigned long flags)
190
+static inline int native_irqs_disabled_flags(unsigned long flags)
180191 {
181192 return flags & IRQMASK_I_BIT;
182193 }
183194
195
+static inline bool native_irqs_disabled(void)
196
+{
197
+ unsigned long flags = native_save_flags();
198
+ return native_irqs_disabled_flags(flags);
199
+}
200
+
201
+#include <asm/irq_pipeline.h>
184202 #include <asm-generic/irqflags.h>
185203
186204 #endif /* ifdef __KERNEL__ */