.. | .. |
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335 | 335 | return IRQ_NONE; |
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336 | 336 | if ((val & PWM_CH_POL(id)) == 0) { |
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337 | 337 | temp_hpr = readl_relaxed(ddata->base + PWM_REG_HPR); |
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338 | | - DBG("hpr=%d\n", temp_hpr); |
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| 338 | + writel_relaxed(0, ddata->base + PWM_REG_HPR); |
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339 | 339 | temp_lpr = readl_relaxed(ddata->base + PWM_REG_LPR); |
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| 340 | + writel_relaxed(0, ddata->base + PWM_REG_LPR); |
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| 341 | + DBG("hpr=%d\n", temp_hpr); |
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340 | 342 | DBG("lpr=%d\n", temp_lpr); |
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| 343 | + |
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341 | 344 | temp_period = ddata->pwm_freq_nstime * temp_lpr / 1000; |
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342 | 345 | if (temp_period > RK_PWM_TIME_BIT0_MIN) { |
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343 | 346 | ddata->period = ddata->temp_period |
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