| .. | .. |
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| 5 | 5 | * Author: Huang Lee <Putin.li@rock-chips.com> |
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| 6 | 6 | */ |
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| 7 | 7 | |
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| 8 | | -#define pr_fmt(fmt) "rga2_mmu: " fmt |
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| 8 | +#define pr_fmt(fmt) "rga_iommu: " fmt |
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| 9 | 9 | |
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| 10 | 10 | #include "rga_iommu.h" |
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| 11 | 11 | #include "rga_dma_buf.h" |
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| .. | .. |
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| 170 | 170 | * size * channel_num * address_size |
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| 171 | 171 | */ |
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| 172 | 172 | order = get_order(size * 3 * sizeof(*mmu_base->buf_virtual)); |
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| 173 | + if (order >= MAX_ORDER) { |
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| 174 | + pr_err("Can not alloc pages with order[%d] for mmu_page_table, max_order = %d\n", |
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| 175 | + order, MAX_ORDER); |
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| 176 | + goto err_free_mmu_base; |
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| 177 | + } |
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| 178 | + |
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| 173 | 179 | mmu_base->buf_virtual = (uint32_t *) __get_free_pages(GFP_KERNEL | GFP_DMA32, order); |
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| 174 | 180 | if (mmu_base->buf_virtual == NULL) { |
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| 175 | 181 | pr_err("Can not alloc pages for mmu_page_table\n"); |
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| .. | .. |
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| 178 | 184 | mmu_base->buf_order = order; |
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| 179 | 185 | |
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| 180 | 186 | order = get_order(size * sizeof(*mmu_base->pages)); |
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| 187 | + if (order >= MAX_ORDER) { |
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| 188 | + pr_err("Can not alloc pages with order[%d] for mmu_base->pages, max_order = %d\n", |
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| 189 | + order, MAX_ORDER); |
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| 190 | + goto err_free_buf_virtual; |
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| 191 | + } |
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| 192 | + |
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| 181 | 193 | mmu_base->pages = (struct page **)__get_free_pages(GFP_KERNEL | GFP_DMA32, order); |
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| 182 | 194 | if (mmu_base->pages == NULL) { |
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| 183 | 195 | pr_err("Can not alloc pages for mmu_base->pages\n"); |
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| .. | .. |
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| 219 | 231 | |
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| 220 | 232 | kfree(base); |
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| 221 | 233 | *mmu_base = NULL; |
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| 234 | +} |
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| 235 | + |
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| 236 | +static int rga_iommu_intr_fault_handler(struct iommu_domain *iommu, struct device *iommu_dev, |
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| 237 | + unsigned long iova, int status, void *arg) |
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| 238 | +{ |
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| 239 | + struct rga_scheduler_t *scheduler = (struct rga_scheduler_t *)arg; |
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| 240 | + struct rga_job *job = scheduler->running_job; |
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| 241 | + |
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| 242 | + if (job == NULL) |
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| 243 | + return 0; |
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| 244 | + |
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| 245 | + pr_err("IOMMU intr fault, IOVA[0x%lx], STATUS[0x%x]\n", iova, status); |
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| 246 | + if (scheduler->ops->irq) |
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| 247 | + scheduler->ops->irq(scheduler); |
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| 248 | + |
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| 249 | + /* iommu interrupts on rga2 do not affect rga2 itself. */ |
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| 250 | + if (!test_bit(RGA_JOB_STATE_INTR_ERR, &job->state)) { |
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| 251 | + set_bit(RGA_JOB_STATE_INTR_ERR, &job->state); |
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| 252 | + scheduler->ops->soft_reset(scheduler); |
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| 253 | + } |
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| 254 | + |
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| 255 | + if (status & RGA_IOMMU_IRQ_PAGE_FAULT) { |
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| 256 | + pr_err("RGA IOMMU: page fault! Please check the memory size.\n"); |
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| 257 | + job->ret = -EACCES; |
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| 258 | + } else if (status & RGA_IOMMU_IRQ_BUS_ERROR) { |
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| 259 | + pr_err("RGA IOMMU: bus error! Please check if the memory is invalid or has been freed.\n"); |
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| 260 | + job->ret = -EACCES; |
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| 261 | + } else { |
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| 262 | + pr_err("RGA IOMMU: Wrong IOMMU interrupt signal!\n"); |
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| 263 | + } |
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| 264 | + |
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| 265 | + return 0; |
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| 222 | 266 | } |
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| 223 | 267 | |
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| 224 | 268 | int rga_iommu_detach(struct rga_iommu_info *info) |
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| .. | .. |
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| 306 | 350 | if (main_iommu == NULL) { |
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| 307 | 351 | main_iommu = scheduler->iommu_info; |
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| 308 | 352 | main_iommu_index = i; |
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| 353 | + iommu_set_fault_handler(main_iommu->domain, |
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| 354 | + rga_iommu_intr_fault_handler, |
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| 355 | + (void *)scheduler); |
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| 309 | 356 | } else { |
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| 310 | 357 | scheduler->iommu_info->domain = main_iommu->domain; |
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| 311 | 358 | scheduler->iommu_info->default_dev = main_iommu->default_dev; |
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