rk3568 rt init

hc

2023-11-06 e3e12f52b214121840b44c91de5b3e5af5d3eb84

 kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/dhd_config.c
..
..
@@ -141,7 +141,7 @@
141
141
 	{BCM43751_CHIP_ID,	1,	DONT_CARE,	"bcm43751a1_pcie_ag",	""},
142
142
 	{BCM43751_CHIP_ID,	2,	DONT_CARE,	"bcm43751a2_pcie_ag",	""},
143
143
 	{BCM43752_CHIP_ID,	1,	DONT_CARE,	"bcm43752a1_pcie_ag",	""},
144
-	{BCM43752_CHIP_ID,	2,	DONT_CARE,	"bcm43752a2_pcie_ag",	"AP6275P"},
144
+	{BCM43752_CHIP_ID,	2,	DONT_CARE,	"bcm43752a2_pcie_ag",	"ap6275p"},
145
145
 	{BCM4375_CHIP_ID,	5,	DONT_CARE,	"bcm4375b4_pcie_ag",	""},
146
146
 #endif
147
147
 #ifdef BCMDBUS
..
..
@@ -271,7 +271,6 @@
271
271
 			chip == BCM4334_CHIP_ID || chip == BCM43340_CHIP_ID ||
272
272
 			chip == BCM43341_CHIP_ID || chip == BCM4324_CHIP_ID ||
273
273
 			chip == BCM4335_CHIP_ID || chip == BCM4339_CHIP_ID ||
274
-			chip == BCM4354_CHIP_ID || chip == BCM4356_CHIP_ID ||
275
274
 			chip == BCM43143_CHIP_ID || chip == BCM43242_CHIP_ID ||
276
275
 			chip == BCM43569_CHIP_ID) {
277
276
 		return false;
..
..
@@ -282,7 +281,7 @@
282
281
 #endif
283
282
 
284
283
 #ifdef BCMSDIO
285
-bool
284
+static void
286
285
 dhd_conf_disable_slpauto(dhd_pub_t *dhd)
287
286
 {
288
287
 	uint chip = dhd->conf->chip;
..
..
@@ -296,10 +295,9 @@
296
295
 			chip == BCM43430_CHIP_ID ||
297
296
 			chip == BCM4345_CHIP_ID || chip == BCM43454_CHIP_ID ||
298
297
 			chip == BCM4359_CHIP_ID) {
299
-		return false;
298
+		dhd_slpauto = FALSE;
300
299
 	}
301
-
302
-	return true;
300
+	CONFIG_MSG("dhd_slpauto = %d\n", dhd_slpauto);
303
301
 }
304
302
 #endif
305
303
 
..
..
@@ -1377,7 +1375,6 @@
1377
1375
 
1378
1376
 	return;
1379
1377
 }
1380
-
1381
1378
 #endif /* DHD_LINUX_STD_FW_API */
1382
1379
 
1383
1380
 void
..
..
@@ -1415,7 +1412,6 @@
1415
1412
 #endif
1416
1413
 
1417
1414
 #ifdef DHD_LINUX_STD_FW_API
1418
-	// preprocess the filename to only left 'name'
1419
1415
 	dhd_conf_add_filepath(dhd, fw_path);
1420
1416
 	dhd_conf_add_filepath(dhd, nv_path);
1421
1417
 	dhd_conf_add_filepath(dhd, dhd->clm_path);
..
..
@@ -2464,12 +2460,24 @@
2464
2460
 	int *hostsleep_set, int *hostsleep_val, int *ret)
2465
2461
 {
2466
2462
 	if (dhd->conf->insuspend & (NO_TXCTL_IN_SUSPEND | WOWL_IN_SUSPEND)) {
2463
+		int wowl_dngldown = 0;
2464
+#ifdef WL_EXT_WOWL
2465
+		wowl_dngldown = dhd_conf_wowl_dngldown(dhd);
2466
+#endif
2467
2467
 		if (cmd == WLC_SET_VAR) {
2468
2468
 			char *psleep = NULL;
2469
-			psleep = strstr(buf, "hostsleep");
2470
-			if (psleep) {
2471
-				*hostsleep_set = 1;
2472
-				memcpy(hostsleep_val, psleep+strlen("hostsleep")+1, sizeof(int));
2469
+			if (wowl_dngldown) {
2470
+				psleep = strstr(buf, "wowl_activate");
2471
+				if (psleep) {
2472
+					*hostsleep_set = 1;
2473
+					memcpy(hostsleep_val, psleep+strlen("wowl_activate")+1, sizeof(int));
2474
+				}
2475
+			} else {
2476
+				psleep = strstr(buf, "hostsleep");
2477
+				if (psleep) {
2478
+					*hostsleep_set = 1;
2479
+					memcpy(hostsleep_val, psleep+strlen("hostsleep")+1, sizeof(int));
2480
+				}
2473
2481
 			}
2474
2482
 		}
2475
2483
 		if (dhd->hostsleep && (!*hostsleep_set || *hostsleep_val)) {
..
..
@@ -2710,6 +2718,21 @@
2710
2718
 	}
2711
2719
 
2712
2720
 	return ret;
2721
+}
2722
+
2723
+int
2724
+dhd_conf_wowl_dngldown(dhd_pub_t *dhd)
2725
+{
2726
+	int wowl_dngldown = 0;
2727
+#ifdef BCMDBUS
2728
+	uint insuspend = 0;
2729
+	insuspend = dhd_conf_get_insuspend(dhd, ALL_IN_SUSPEND);
2730
+	if ((insuspend & WOWL_IN_SUSPEND) && dhd_master_mode) {
2731
+		wowl_dngldown = dhd->conf->wowl_dngldown;
2732
+	}
2733
+#endif
2734
+
2735
+	return wowl_dngldown;
2713
2736
 }
2714
2737
 #endif
2715
2738
 
..
..
@@ -2971,8 +2994,12 @@
2971
2994
 			for(i=0; i<conf->pkt_filter_add.count; i++) {
2972
2995
 				dhd_conf_wowl_pattern(dhd, ifidx, TRUE, conf->pkt_filter_add.filter[i]);
2973
2996
 			}
2997
+			CONFIG_MSG("wowl = 0x%x\n", conf->wowl);
2974
2998
 			dhd_conf_set_intiovar(dhd, ifidx, WLC_SET_VAR, "wowl", conf->wowl, 0, FALSE);
2975
-			dhd_conf_set_intiovar(dhd, ifidx, WLC_SET_VAR, "wowl_activate", 1, 0, FALSE);
2999
+#ifdef BCMDBUS
3000
+			CONFIG_MSG("wowl_dngldown = %d\n", conf->wowl_dngldown);
3001
+			dhd_conf_set_intiovar(dhd, ifidx, WLC_SET_VAR, "wowl_dngldown", conf->wowl_dngldown, 1, FALSE);
3002
+#endif
2976
3003
 			dhd_conf_wowl_wakeind(dhd, ifidx, TRUE);
2977
3004
 		}
2978
3005
 #endif
..
..
@@ -2988,7 +3015,7 @@
2988
3015
 #ifdef WL_EXT_WOWL
2989
3016
 		if (insuspend & WOWL_IN_SUSPEND) {
2990
3017
 			dhd_conf_wowl_wakeind(dhd, ifidx, FALSE);
2991
-			dhd_conf_set_intiovar(dhd, ifidx, WLC_SET_VAR, "wowl_activate", 0, 0, FALSE);
3018
+//			dhd_conf_set_intiovar(dhd, ifidx, WLC_SET_VAR, "wowl_activate", 0, 0, FALSE);
2992
3019
 			dhd_conf_set_intiovar(dhd, ifidx, WLC_SET_VAR, "wowl", 0, 0, FALSE);
2993
3020
 			dhd_conf_wowl_pattern(dhd, ifidx, FALSE, "clr");
2994
3021
 		}
..
..
@@ -3038,19 +3065,32 @@
3038
3065
 
3039
3066
 	if (suspend) {
3040
3067
 		if (insuspend & (WOWL_IN_SUSPEND | NO_TXCTL_IN_SUSPEND)) {
3041
-#ifdef BCMSDIO
3042
3068
 			uint32 intstatus = 0;
3043
-			int ret = 0;
3044
-#endif
3045
-			int hostsleep = 2;
3069
+			int ret = 0, hostsleep = 2, wowl_dngldown = 0;
3046
3070
 #ifdef WL_EXT_WOWL
3047
3071
 			hostsleep = 1;
3072
+			if ((insuspend & WOWL_IN_SUSPEND) && dhd_master_mode) {
3073
+				dhd_conf_set_intiovar(dhd, 0, WLC_SET_VAR, "wowl_activate", 1, 0, FALSE);
3074
+#ifdef BCMDBUS
3075
+				wowl_dngldown = dhd->conf->wowl_dngldown;
3048
3076
 #endif
3049
-			dhd_conf_set_intiovar(dhd, 0, WLC_SET_VAR, "hostsleep", hostsleep, 0, FALSE);
3077
+			}
3078
+#endif
3079
+			if (!wowl_dngldown) {
3080
+				dhd_conf_set_intiovar(dhd, 0, WLC_SET_VAR, "hostsleep", hostsleep, 0, FALSE);
3081
+			}
3050
3082
 #ifdef BCMSDIO
3051
3083
 			ret = dhd_bus_sleep(dhd, TRUE, &intstatus);
3052
-			CONFIG_TRACE("ret = %d, intstatus = 0x%x\n", ret, intstatus);
3053
3084
 #endif
3085
+#ifdef BCMPCIE
3086
+			ret = dhd_bus_sleep(dhd, TRUE, NULL);
3087
+#endif
3088
+#ifdef BCMDBUS
3089
+			if (wowl_dngldown) {
3090
+				ret = dhd_bus_sleep(dhd, TRUE, NULL);
3091
+			}
3092
+#endif
3093
+			CONFIG_MSG("ret = %d, intstatus = 0x%x\n", ret, intstatus);
3054
3094
 		}
3055
3095
 	} else {
3056
3096
 		if (insuspend & (WOWL_IN_SUSPEND | NO_TXCTL_IN_SUSPEND)) {
..
..
@@ -3976,9 +4016,9 @@
3976
4016
 		CONFIG_MSG("dhd_doflow = %d\n", dhd_doflow);
3977
4017
 	}
3978
4018
 	else if (!strncmp("dhd_slpauto=", full_param, len_param)) {
3979
-		if (!strncmp(data, "0", 1))
3980
-			dhd_slpauto = FALSE;
3981
-		else if (dhd_conf_disable_slpauto(dhd))
4019
+		if (!strncmp(data, "0", 1)) {
4020
+			dhd_conf_disable_slpauto(dhd);
4021
+		} else
3982
4022
 			dhd_slpauto = TRUE;
3983
4023
 		CONFIG_MSG("dhd_slpauto = %d\n", dhd_slpauto);
3984
4024
 	}
..
..
@@ -4150,6 +4190,14 @@
4150
4190
 		conf->enq_hdr_pkt = (int)simple_strtol(data, NULL, 0);
4151
4191
 		CONFIG_MSG("enq_hdr_pkt = 0x%x\n", conf->enq_hdr_pkt);
4152
4192
 	}
4193
+	else if (!strncmp("aspm=", full_param, len_param)) {
4194
+		conf->aspm = (int)simple_strtol(data, NULL, 0);
4195
+		CONFIG_MSG("aspm = %d\n", conf->aspm);
4196
+	}
4197
+	else if (!strncmp("l1ss=", full_param, len_param)) {
4198
+		conf->l1ss = (int)simple_strtol(data, NULL, 0);
4199
+		CONFIG_MSG("l1ss = %d\n", conf->l1ss);
4200
+	}
4153
4201
 	else
4154
4202
 		return false;
4155
4203
 
..
..
@@ -4208,6 +4256,12 @@
4208
4256
 		conf->wowl = (int)simple_strtol(data, NULL, 0);
4209
4257
 		CONFIG_MSG("wowl = 0x%x\n", conf->wowl);
4210
4258
 	}
4259
+#ifdef BCMDBUS
4260
+	else if (!strncmp("wowl_dngldown=", full_param, len_param)) {
4261
+		conf->wowl_dngldown = (int)simple_strtol(data, NULL, 0);
4262
+		CONFIG_MSG("wowl_dngldown = 0x%x\n", conf->wowl_dngldown);
4263
+	}
4264
+#endif
4211
4265
 #endif
4212
4266
 	else if (!strncmp("rekey_offload=", full_param, len_param)) {
4213
4267
 		if (!strncmp(data, "1", 1))
..
..
@@ -4819,7 +4873,108 @@
4819
4873
 	}
4820
4874
 
4821
4875
 }
4876
+
4877
+static void
4878
+dhd_conf_set_ampdu_mpdu(dhd_pub_t *dhd)
4879
+{
4880
+	uint chip = dhd->conf->chip;
4881
+	char ampdu_mpdu[32] = "ampdu_mpdu=";
4882
+	int val = -1;
4883
+
4884
+	if (chip == BCM43362_CHIP_ID || chip == BCM4330_CHIP_ID ||
4885
+			chip == BCM4334_CHIP_ID || chip == BCM43340_CHIP_ID ||
4886
+			chip == BCM43341_CHIP_ID || chip == BCM4324_CHIP_ID ||
4887
+			chip == BCM4335_CHIP_ID || chip == BCM4339_CHIP_ID ||
4888
+			chip == BCM4354_CHIP_ID || chip == BCM4356_CHIP_ID ||
4889
+			chip == BCM4371_CHIP_ID ||
4890
+			chip == BCM43430_CHIP_ID ||
4891
+			chip == BCM4345_CHIP_ID || chip == BCM43454_CHIP_ID ||
4892
+			chip == BCM4359_CHIP_ID || chip == BCM43012_CHIP_ID) {
4893
+		val = 16;
4894
+	} else if (chip == BCM43751_CHIP_ID || chip == BCM43752_CHIP_ID) {
4895
+		val = 32;
4896
+	}
4897
+
4898
+	if (val > 0) {
4899
+		snprintf(ampdu_mpdu+strlen(ampdu_mpdu), sizeof(ampdu_mpdu), "%d", val);
4900
+		dhd_conf_set_wl_cmd(dhd, ampdu_mpdu, TRUE);
4901
+	}
4902
+}
4903
+
4904
+#if defined(SDIO_ISR_THREAD)
4905
+static void
4906
+dhd_conf_set_intr_extn(dhd_pub_t *dhd)
4907
+{
4908
+	uint chip = dhd->conf->chip;
4909
+
4910
+	if (chip == BCM43012_CHIP_ID ||
4911
+			chip == BCM4335_CHIP_ID || chip == BCM4339_CHIP_ID ||
4912
+			chip == BCM43454_CHIP_ID || chip == BCM4345_CHIP_ID ||
4913
+			chip == BCM4354_CHIP_ID || chip == BCM4356_CHIP_ID ||
4914
+			chip == BCM4345_CHIP_ID || chip == BCM4371_CHIP_ID ||
4915
+			chip == BCM4359_CHIP_ID ||
4916
+			chip == BCM43751_CHIP_ID || chip == BCM43752_CHIP_ID ||
4917
+			chip == BCM4375_CHIP_ID) {
4918
+		CONFIG_TRACE("enable intr_extn\n");
4919
+		dhd->conf->intr_extn = TRUE;
4920
+	}
4921
+}
4922
+#endif /* SDIO_ISR_THREAD */
4822
4923
 #endif
4924
+
4925
+static void
4926
+dhd_conf_set_txbf(dhd_pub_t *dhd)
4927
+{
4928
+	uint chip = dhd->conf->chip;
4929
+
4930
+	if (chip == BCM4354_CHIP_ID || chip == BCM4356_CHIP_ID ||
4931
+			chip == BCM4371_CHIP_ID || chip == BCM4359_CHIP_ID ||
4932
+			chip == BCM43569_CHIP_ID ||
4933
+			chip == BCM43751_CHIP_ID || chip == BCM43752_CHIP_ID ||
4934
+			chip == BCM4375_CHIP_ID) {
4935
+		CONFIG_TRACE("enable txbf\n");
4936
+		dhd_conf_set_intiovar(dhd, 0, WLC_SET_VAR, "txbf", 1, 0, FALSE);
4937
+	}
4938
+}
4939
+
4940
+static void
4941
+dhd_conf_tput_improve(dhd_pub_t *dhd)
4942
+{
4943
+	struct dhd_conf *conf = dhd->conf;
4944
+	uint chip = conf->chip;
4945
+	uint chiprev = conf->chiprev;
4946
+
4947
+	if ((chip == BCM43430_CHIP_ID && chiprev == 2) ||
4948
+			chip == BCM43012_CHIP_ID ||
4949
+			chip == BCM4335_CHIP_ID || chip == BCM4339_CHIP_ID ||
4950
+			chip == BCM43454_CHIP_ID || chip == BCM4345_CHIP_ID ||
4951
+			chip == BCM4354_CHIP_ID || chip == BCM4356_CHIP_ID ||
4952
+			chip == BCM4345_CHIP_ID || chip == BCM4371_CHIP_ID ||
4953
+			chip == BCM43569_CHIP_ID || chip == BCM4359_CHIP_ID ||
4954
+			chip == BCM43751_CHIP_ID || chip == BCM43752_CHIP_ID ||
4955
+			chip == BCM4375_CHIP_ID) {
4956
+		CONFIG_TRACE("enable tput parameters\n");
4957
+#ifdef DHDTCPACK_SUPPRESS
4958
+#ifdef BCMSDIO
4959
+		conf->tcpack_sup_mode = TCPACK_SUP_REPLACE;
4960
+#endif
4961
+#endif
4962
+#if defined(BCMSDIO) || defined(BCMPCIE)
4963
+		dhd_rxbound = 128;
4964
+		dhd_txbound = 64;
4965
+#endif
4966
+		conf->frameburst = 1;
4967
+#ifdef BCMSDIO
4968
+		conf->dhd_txminmax = -1;
4969
+		conf->txinrx_thres = 128;
4970
+#endif
4971
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0))
4972
+		conf->orphan_move = 1;
4973
+#else
4974
+		conf->orphan_move = 0;
4975
+#endif
4976
+	}
4977
+}
4823
4978
 
4824
4979
 #ifdef UPDATE_MODULE_NAME
4825
4980
 #if defined(BCMSDIO) || defined(BCMPCIE)
..
..
@@ -4915,26 +5070,14 @@
4915
5070
 	dhd_conf_preinit_ioctls_sta(dhd, 0);
4916
5071
 	dhd_conf_set_wl_cmd(dhd, wl_preinit, TRUE);
4917
5072
 #if defined(BCMSDIO)
4918
-	if (conf->chip == BCM43751_CHIP_ID || conf->chip == BCM43752_CHIP_ID) {
4919
-		char ampdu_mpdu[] = "ampdu_mpdu=32";
4920
-		dhd_conf_set_wl_cmd(dhd, ampdu_mpdu, TRUE);
4921
-	} else {
4922
-		char ampdu_mpdu[] = "ampdu_mpdu=16";
4923
-		dhd_conf_set_wl_cmd(dhd, ampdu_mpdu, TRUE);
4924
-	}
5073
+	dhd_conf_set_ampdu_mpdu(dhd);
4925
5074
 #endif
4926
5075
 
4927
5076
 #ifdef DHD_TPUT_PATCH
4928
5077
 	if (dhd->conf->mtu)
4929
5078
 		dhd_change_mtu(dhd, dhd->conf->mtu, 0);
4930
5079
 #endif
4931
-	if (conf->chip == BCM4354_CHIP_ID || conf->chip == BCM4356_CHIP_ID ||
4932
-			conf->chip == BCM4371_CHIP_ID || conf->chip == BCM4359_CHIP_ID ||
4933
-			conf->chip == BCM43569_CHIP_ID ||
4934
-			conf->chip == BCM43751_CHIP_ID || conf->chip == BCM43752_CHIP_ID ||
4935
-			conf->chip == BCM4375_CHIP_ID) {
4936
-		dhd_conf_set_intiovar(dhd, 0, WLC_SET_VAR, "txbf", 1, 0, FALSE);
4937
-	}
5080
+	dhd_conf_set_txbf(dhd);
4938
5081
 	if (conf->chip == BCM4375_CHIP_ID) {
4939
5082
 		char he_cmd[] = "110=1, nmode=1, vhtmode=1, he=enab 1";
4940
5083
 		dhd_conf_set_wl_cmd(dhd, he_cmd, TRUE);
..
..
@@ -5115,10 +5258,12 @@
5115
5258
 #endif
5116
5259
 #endif
5117
5260
 #ifdef BCMPCIE
5118
-	conf->bus_deepsleep_disable = 1;
5261
+	conf->bus_deepsleep_disable = -1;
5119
5262
 	conf->flow_ring_queue_threshold = FLOW_RING_QUEUE_THRESHOLD;
5120
5263
 	conf->d2h_intr_method = -1;
5121
5264
 	conf->d2h_intr_control = -1;
5265
+	conf->aspm = -1;
5266
+	conf->l1ss = -1;
5122
5267
 	conf->enq_hdr_pkt = 0;
5123
5268
 #endif
5124
5269
 	conf->dpc_cpucore = -1;
..
..
@@ -5135,6 +5280,9 @@
5135
5280
 #ifdef WL_EXT_WOWL
5136
5281
 	dhd_master_mode = TRUE;
5137
5282
 	conf->wowl = WL_WOWL_NET|WL_WOWL_DIS|WL_WOWL_BCN;
5283
+#ifdef BCMDBUS
5284
+	conf->wowl_dngldown = 0;
5285
+#endif
5138
5286
 	conf->insuspend |= (WOWL_IN_SUSPEND | NO_TXDATA_IN_SUSPEND);
5139
5287
 #endif
5140
5288
 	if (conf->suspend_mode == PM_NOTIFIER || conf->suspend_mode == SUSPEND_MODE_2)
..
..
@@ -5226,46 +5374,9 @@
5226
5374
 	memset(conf->isam_enable, 0, sizeof(conf->isam_enable));
5227
5375
 #endif
5228
5376
 #if defined(SDIO_ISR_THREAD)
5229
-	if (conf->chip == BCM43012_CHIP_ID ||
5230
-			conf->chip == BCM4335_CHIP_ID || conf->chip == BCM4339_CHIP_ID ||
5231
-			conf->chip == BCM43454_CHIP_ID || conf->chip == BCM4345_CHIP_ID ||
5232
-			conf->chip == BCM4354_CHIP_ID || conf->chip == BCM4356_CHIP_ID ||
5233
-			conf->chip == BCM4345_CHIP_ID || conf->chip == BCM4371_CHIP_ID ||
5234
-			conf->chip == BCM4359_CHIP_ID ||
5235
-			conf->chip == BCM43751_CHIP_ID || conf->chip == BCM43752_CHIP_ID ||
5236
-			conf->chip == BCM4375_CHIP_ID) {
5237
-		conf->intr_extn = TRUE;
5238
-	}
5377
+	dhd_conf_set_intr_extn(dhd);
5239
5378
 #endif
5240
-	if ((conf->chip == BCM43430_CHIP_ID && conf->chiprev == 2) ||
5241
-			conf->chip == BCM43012_CHIP_ID ||
5242
-			conf->chip == BCM4335_CHIP_ID || conf->chip == BCM4339_CHIP_ID ||
5243
-			conf->chip == BCM43454_CHIP_ID || conf->chip == BCM4345_CHIP_ID ||
5244
-			conf->chip == BCM4354_CHIP_ID || conf->chip == BCM4356_CHIP_ID ||
5245
-			conf->chip == BCM4345_CHIP_ID || conf->chip == BCM4371_CHIP_ID ||
5246
-			conf->chip == BCM43569_CHIP_ID || conf->chip == BCM4359_CHIP_ID ||
5247
-			conf->chip == BCM43751_CHIP_ID || conf->chip == BCM43752_CHIP_ID ||
5248
-			conf->chip == BCM4375_CHIP_ID) {
5249
-#ifdef DHDTCPACK_SUPPRESS
5250
-#ifdef BCMSDIO
5251
-		conf->tcpack_sup_mode = TCPACK_SUP_REPLACE;
5252
-#endif
5253
-#endif
5254
-#if defined(BCMSDIO) || defined(BCMPCIE)
5255
-		dhd_rxbound = 128;
5256
-		dhd_txbound = 64;
5257
-#endif
5258
-		conf->frameburst = 1;
5259
-#ifdef BCMSDIO
5260
-		conf->dhd_txminmax = -1;
5261
-		conf->txinrx_thres = 128;
5262
-#endif
5263
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0))
5264
-		conf->orphan_move = 1;
5265
-#else
5266
-		conf->orphan_move = 0;
5267
-#endif
5268
-	}
5379
+	dhd_conf_tput_improve(dhd);
5269
5380
 #ifdef DHD_TPUT_PATCH
5270
5381
 	if (conf->chip == BCM43751_CHIP_ID || conf->chip == BCM43752_CHIP_ID ||
5271
5382
 			conf->chip == BCM4375_CHIP_ID) {