.. | .. |
---|
608 | 608 | if (is_3dlut_upd) |
---|
609 | 609 | rkisp_write(dev, ISP_3DLUT_UPDATE, 1, true); |
---|
610 | 610 | |
---|
| 611 | + /* if output stream enable, wait it end */ |
---|
| 612 | + val = rkisp_read(dev, CIF_MI_CTRL_SHD, true); |
---|
| 613 | + if (val & CIF_MI_CTRL_SHD_MP_OUT_ENABLED) |
---|
| 614 | + dev->irq_ends_mask |= ISP_FRAME_MP; |
---|
| 615 | + else |
---|
| 616 | + dev->irq_ends_mask &= ~ISP_FRAME_MP; |
---|
| 617 | + if (val & CIF_MI_CTRL_SHD_SP_OUT_ENABLED) |
---|
| 618 | + dev->irq_ends_mask |= ISP_FRAME_SP; |
---|
| 619 | + else |
---|
| 620 | + dev->irq_ends_mask &= ~ISP_FRAME_SP; |
---|
| 621 | + |
---|
611 | 622 | memset(dev->filt_state, 0, sizeof(dev->filt_state)); |
---|
612 | 623 | dev->filt_state[RDBK_F_VS] = dma2frm; |
---|
613 | 624 | |
---|
.. | .. |
---|
735 | 746 | if (!completion_done(&dev->hw_dev->monitor.cmpl)) |
---|
736 | 747 | complete(&dev->hw_dev->monitor.cmpl); |
---|
737 | 748 | } |
---|
738 | | - if (dev->irq_ends != dev->irq_ends_mask || !IS_HDR_RDBK(dev->rd_mode)) |
---|
| 749 | + if ((dev->irq_ends & dev->irq_ends_mask) != dev->irq_ends_mask || |
---|
| 750 | + !IS_HDR_RDBK(dev->rd_mode)) |
---|
739 | 751 | return; |
---|
740 | 752 | |
---|
741 | | - if (!(dev->irq_ends_mask & (ISP_FRAME_MP | ISP_FRAME_SP | ISP_FRAME_MPFBC))) |
---|
742 | | - dev->isp_state = ISP_STOP; |
---|
| 753 | + /* check output stream is off */ |
---|
| 754 | + val = ISP_FRAME_MP | ISP_FRAME_SP | ISP_FRAME_MPFBC; |
---|
| 755 | + if (!(dev->irq_ends_mask & val)) { |
---|
| 756 | + u32 state = dev->isp_state; |
---|
| 757 | + struct rkisp_stream *s; |
---|
743 | 758 | |
---|
| 759 | + for (val = 0; val <= RKISP_STREAM_SP; val++) { |
---|
| 760 | + s = &dev->cap_dev.stream[val]; |
---|
| 761 | + dev->isp_state = ISP_STOP; |
---|
| 762 | + if (s->streaming) { |
---|
| 763 | + dev->isp_state = state; |
---|
| 764 | + break; |
---|
| 765 | + } |
---|
| 766 | + } |
---|
| 767 | + } |
---|
| 768 | + |
---|
| 769 | + val = 0; |
---|
744 | 770 | dev->irq_ends = 0; |
---|
745 | 771 | switch (dev->rd_mode) { |
---|
746 | 772 | case HDR_RDBK_FRAME3://for rd1 rd0 rd2 |
---|
.. | .. |
---|
754 | 780 | /* FALLTHROUGH */ |
---|
755 | 781 | } |
---|
756 | 782 | rkisp2_rawrd_isr(val, dev); |
---|
757 | | - if (!(dev->irq_ends_mask & (ISP_FRAME_MP | ISP_FRAME_SP | ISP_FRAME_MPFBC))) |
---|
758 | | - dev->isp_state = ISP_STOP; |
---|
759 | 783 | if (dev->dmarx_dev.trigger == T_MANUAL) |
---|
760 | 784 | rkisp_rdbk_trigger_event(dev, T_CMD_END, NULL); |
---|
761 | 785 | if (dev->isp_state == ISP_STOP) |
---|
.. | .. |
---|
1382 | 1406 | ret = -EINVAL; |
---|
1383 | 1407 | } |
---|
1384 | 1408 | |
---|
| 1409 | + /* fix 3a_wr no output with selfpath */ |
---|
| 1410 | + if (dev->isp_ver == ISP_V21) |
---|
| 1411 | + dpcl |= CIF_VI_DPCL_CHAN_MODE_MP | CIF_VI_DPCL_MP_MUX_MRSZ_MI; |
---|
| 1412 | + |
---|
1385 | 1413 | writel(dpcl, dev->base_addr + CIF_VI_DPCL); |
---|
1386 | 1414 | |
---|
1387 | 1415 | return ret; |
---|
.. | .. |
---|
1483 | 1511 | |
---|
1484 | 1512 | if (atomic_read(&dev->hw_dev->refcnt) > 1) |
---|
1485 | 1513 | goto end; |
---|
1486 | | - |
---|
1487 | | - if (dev->hw_dev->monitor.is_en) { |
---|
1488 | | - dev->hw_dev->monitor.is_en = 0; |
---|
1489 | | - dev->hw_dev->monitor.state = ISP_STOP; |
---|
1490 | | - if (!completion_done(&dev->hw_dev->monitor.cmpl)) |
---|
1491 | | - complete(&dev->hw_dev->monitor.cmpl); |
---|
1492 | | - } |
---|
1493 | 1514 | /* |
---|
1494 | 1515 | * ISP(mi) stop in mi frame end -> Stop ISP(mipi) -> |
---|
1495 | 1516 | * Stop ISP(isp) ->wait for ISP isp off |
---|
.. | .. |
---|
2241 | 2262 | if (dev->hw_dev->is_single) { |
---|
2242 | 2263 | for (i = 0; i < RKISP_MAX_STREAM; i++) { |
---|
2243 | 2264 | stream = &dev->cap_dev.stream[i]; |
---|
2244 | | - if (stream->streaming) |
---|
| 2265 | + if (stream->streaming && !stream->next_buf) |
---|
2245 | 2266 | stream->ops->frame_end(stream); |
---|
2246 | 2267 | } |
---|
2247 | 2268 | } |
---|
.. | .. |
---|
2252 | 2273 | struct rkisp_device *isp_dev = sd_to_isp_dev(sd); |
---|
2253 | 2274 | |
---|
2254 | 2275 | if (!on) { |
---|
2255 | | - rkisp_stop_3a_run(isp_dev); |
---|
2256 | 2276 | wait_event_timeout(isp_dev->sync_onoff, |
---|
2257 | 2277 | isp_dev->irq_ends_mask == (ISP_FRAME_END | ISP_FRAME_IN) && |
---|
2258 | 2278 | (!IS_HDR_RDBK(isp_dev->rd_mode) || |
---|
.. | .. |
---|
2260 | 2280 | rkisp_isp_stop(isp_dev); |
---|
2261 | 2281 | atomic_dec(&isp_dev->hw_dev->refcnt); |
---|
2262 | 2282 | rkisp_params_stream_stop(&isp_dev->params_vdev); |
---|
| 2283 | + rkisp_stop_3a_run(isp_dev); |
---|
2263 | 2284 | return 0; |
---|
2264 | 2285 | } |
---|
2265 | 2286 | |
---|