rk3568 rt init

hc

2023-11-06 e3e12f52b214121840b44c91de5b3e5af5d3eb84

 kernel/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
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@@ -115,6 +115,37 @@
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 	int cos_hue;
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 };
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+#define ACM_GAIN_LUT_HY_LENGTH		(9*17)
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+#define ACM_GAIN_LUT_HY_TOTAL_LENGTH	(ACM_GAIN_LUT_HY_LENGTH * 3)
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+#define ACM_GAIN_LUT_HS_LENGTH		(13*17)
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+#define ACM_GAIN_LUT_HS_TOTAL_LENGTH	(ACM_GAIN_LUT_HS_LENGTH * 3)
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+#define ACM_DELTA_LUT_H_LENGTH		65
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+#define ACM_DELTA_LUT_H_TOTAL_LENGTH	(ACM_DELTA_LUT_H_LENGTH * 3)
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+
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+struct post_acm {
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+	s16 delta_lut_h[ACM_DELTA_LUT_H_TOTAL_LENGTH];
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+	s16 gain_lut_hy[ACM_GAIN_LUT_HY_TOTAL_LENGTH];
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+	s16 gain_lut_hs[ACM_GAIN_LUT_HS_TOTAL_LENGTH];
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+	u16 y_gain;
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+	u16 h_gain;
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+	u16 s_gain;
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+	u16 acm_enable;
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+};
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+
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+struct post_csc {
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+	u16 hue;
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+	u16 saturation;
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+	u16 contrast;
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+	u16 brightness;
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+	u16 r_gain;
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+	u16 g_gain;
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+	u16 b_gain;
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+	u16 r_offset;
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+	u16 g_offset;
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+	u16 b_offset;
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+	u16 csc_enable;
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+};
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+
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 #define VOP_OUTPUT_IF_RGB	BIT(0)
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 #define VOP_OUTPUT_IF_BT1120	BIT(1)
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 #define VOP_OUTPUT_IF_BT656	BIT(2)
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@@ -128,6 +159,7 @@
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 #define VOP_OUTPUT_IF_DP1	BIT(10)
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 #define VOP_OUTPUT_IF_HDMI0	BIT(11)
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 #define VOP_OUTPUT_IF_HDMI1	BIT(12)
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+#define VOP_OUTPUT_IF_TV	BIT(13)
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 struct rockchip_crtc_state {
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 	struct drm_crtc_state base;
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@@ -181,6 +213,9 @@
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 	u32 line_flag;
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 	u8 mode_update;
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 	struct rockchip_hdr_state hdr;
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+	struct drm_property_blob *hdr_ext_data;
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+	struct drm_property_blob *acm_lut_data;
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+	struct drm_property_blob *post_csc_data;
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 };
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 #define to_rockchip_crtc_state(s) \
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 		container_of(s, struct rockchip_crtc_state, base)