rk3568 rt init

hc

2023-11-06 e3e12f52b214121840b44c91de5b3e5af5d3eb84

 kernel/drivers/gpu/drm/i915/intel_sprite.c
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@@ -36,6 +36,7 @@
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 #include <drm/drm_rect.h>
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 #include <drm/drm_atomic.h>
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 #include <drm/drm_plane_helper.h>
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+#include <linux/locallock.h>
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 #include "intel_drv.h"
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 #include "intel_frontbuffer.h"
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 #include <drm/i915_drm.h>
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@@ -59,6 +60,8 @@
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 #else
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 #define VBLANK_EVASION_TIME_US 100
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 #endif
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+
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+static DEFINE_LOCAL_IRQ_LOCK(pipe_update_lock);
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 /**
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  * intel_pipe_update_start() - start update of a set of display registers
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@@ -107,7 +110,7 @@
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 	if (intel_psr_wait_for_idle(new_crtc_state))
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 		DRM_ERROR("PSR idle timed out, atomic update may fail\n");
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-	local_irq_disable();
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+	local_lock_irq(pipe_update_lock);
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 	crtc->debug.min_vbl = min;
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 	crtc->debug.max_vbl = max;
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@@ -131,11 +134,11 @@
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 			break;
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 		}
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-		local_irq_enable();
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+		local_unlock_irq(pipe_update_lock);
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 		timeout = schedule_timeout(timeout);
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-		local_irq_disable();
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+		local_lock_irq(pipe_update_lock);
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 	}
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 	finish_wait(wq, &wait);
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@@ -168,7 +171,7 @@
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 	return;
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 irq_disable:
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-	local_irq_disable();
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+	local_lock_irq(pipe_update_lock);
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 }
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 /**
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@@ -204,7 +207,7 @@
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 		new_crtc_state->base.event = NULL;
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 	}
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-	local_irq_enable();
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+	local_unlock_irq(pipe_update_lock);
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 	if (intel_vgpu_active(dev_priv))
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 		return;