rk3568 rt init

hc

2023-11-06 e3e12f52b214121840b44c91de5b3e5af5d3eb84

 kernel/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
..
..
@@ -586,6 +586,16 @@
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 #define HDMI_I2CM_FS_SCL_LCNT_1_ADDR            0x7E11
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 #define HDMI_I2CM_FS_SCL_LCNT_0_ADDR            0x7E12
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 #define HDMI_I2CM_SDA_HOLD                      0x7E13
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+#define HDMI_I2CM_SCDC_READ_UPDATE              0x7E14
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+#define HDMI_I2CM_READ_REQ_EN_MSK               BIT(4)
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+#define HDMI_I2CM_READ_REQ_EN_OFFSET            4
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+#define HDMI_I2CM_READ_UPDATE_MSK               BIT(0)
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+#define HDMI_I2CM_READ_UPDATE_OFFSET            0
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+#define HDMI_I2CM_I2CM_UPRD_VSYNC_EN_MSK        BIT(5)
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+#define HDMI_I2CM_I2CM_UPRD_VSYNC_EN_OFFSET     5
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+#define	HDMI_I2CM_READ_BUFF0                    0x7E20
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+#define	HDMI_I2CM_SCDC_UPDATE0                  0x7E30
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+#define	HDMI_I2CM_SCDC_UPDATE1                  0x7E31
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 enum {
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 /* PRODUCT_ID0 field values */
..
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@@ -1152,7 +1162,10 @@
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 	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,
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 /* I2CM_OPERATION field values */
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+	HDMI_I2CM_OPERATION_BUS_CLEAR = 0x20,
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 	HDMI_I2CM_OPERATION_WRITE = 0x10,
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+	HDMI_I2CM_OPERATION_READ8_EXT = 0x8,
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+	HDMI_I2CM_OPERATION_READ8 = 0x4,
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 	HDMI_I2CM_OPERATION_READ_EXT = 0x2,
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 	HDMI_I2CM_OPERATION_READ = 0x1,
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