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hc
2023-11-06 e3e12f52b214121840b44c91de5b3e5af5d3eb84 
 kernel/drivers/char/hw_random/rockchip-rng.c
....@@ -87,6 +87,27 @@
8787 #define TRNG_v1_VERSION_CODE			0x46bc
8888 /* end of TRNG_V1 register define */
8989 
90
+/* start of RKRNG register define */
91
+#define RKRNG_CTRL				0x0010
92
+#define RKRNG_CTRL_INST_REQ			BIT(0)
93
+#define RKRNG_CTRL_RESEED_REQ			BIT(1)
94
+#define RKRNG_CTRL_TEST_REQ			BIT(2)
95
+#define RKRNG_CTRL_SW_DRNG_REQ			BIT(3)
96
+#define RKRNG_CTRL_SW_TRNG_REQ			BIT(4)
97
+
98
+#define RKRNG_STATE				0x0014
99
+#define RKRNG_STATE_INST_ACK			BIT(0)
100
+#define RKRNG_STATE_RESEED_ACK			BIT(1)
101
+#define RKRNG_STATE_TEST_ACK			BIT(2)
102
+#define RKRNG_STATE_SW_DRNG_ACK			BIT(3)
103
+#define RKRNG_STATE_SW_TRNG_ACK			BIT(4)
104
+
105
+/* DRNG_DATA_0 ~ DNG_DATA_7 */
106
+#define RKRNG_DRNG_DATA_0			0x0070
107
+#define RKRNG_DRNG_DATA_7			0x008C
108
+
109
+/* end of RKRNG register define */
110
+
90111 struct rk_rng_soc_data {
91112 	u32 default_offset;
92113 
....@@ -178,7 +199,7 @@
178199 		*(u32 *)(buf + i) = be32_to_cpu(rk_rng_readl(rng, offset + i));
179200 }
180201 
181
-static int rk_crypto_v1_read(struct hwrng *rng, void *buf, size_t max, bool wait)
202
+static int crypto_v1_read(struct hwrng *rng, void *buf, size_t max, bool wait)
182203 {
183204 	int ret = 0;
184205 	u32 reg_ctrl = 0;
....@@ -211,7 +232,7 @@
211232 	return ret;
212233 }
213234 
214
-static int rk_crypto_v2_read(struct hwrng *rng, void *buf, size_t max, bool wait)
235
+static int crypto_v2_read(struct hwrng *rng, void *buf, size_t max, bool wait)
215236 {
216237 	int ret = 0;
217238 	u32 reg_ctrl = 0;
....@@ -246,18 +267,12 @@
246267 	return ret;
247268 }
248269 
249
-static int rk_trng_v1_init(struct hwrng *rng)
270
+static int trng_v1_init(struct hwrng *rng)
250271 {
251272 	int ret;
252273 	uint32_t auto_reseed_cnt = 1000;
253274 	uint32_t reg_ctrl, status, version;
254275 	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
255
-
256
-	ret = pm_runtime_get_sync(rk_rng->dev);
257
-	if (ret < 0) {
258
-		pm_runtime_put_noidle(rk_rng->dev);
259
-		return ret;
260
-	}
261276 
262277 	version = rk_rng_readl(rk_rng, TRNG_V1_VERSION);
263278 	if (version != TRNG_v1_VERSION_CODE) {
....@@ -296,13 +311,11 @@
296311 
297312 	ret = 0;
298313 exit:
299
-	pm_runtime_mark_last_busy(rk_rng->dev);
300
-	pm_runtime_put_sync_autosuspend(rk_rng->dev);
301314 
302315 	return ret;
303316 }
304317 
305
-static int rk_trng_v1_read(struct hwrng *rng, void *buf, size_t max, bool wait)
318
+static int trng_v1_read(struct hwrng *rng, void *buf, size_t max, bool wait)
306319 {
307320 	int ret = 0;
308321 	u32 reg_ctrl = 0;
....@@ -345,37 +358,92 @@
345358 	return ret;
346359 }
347360 
348
-static const struct rk_rng_soc_data rk_crypto_v1_soc_data = {
361
+static int rkrng_init(struct hwrng *rng)
362
+{
363
+	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
364
+	u32 reg = 0;
365
+
366
+	rk_rng_writel(rk_rng, HIWORD_UPDATE(0, 0xffff, 0), RKRNG_CTRL);
367
+
368
+	reg = rk_rng_readl(rk_rng, RKRNG_STATE);
369
+	rk_rng_writel(rk_rng, reg, RKRNG_STATE);
370
+
371
+	return 0;
372
+}
373
+
374
+static int rkrng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
375
+{
376
+	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
377
+	u32 reg_ctrl = 0;
378
+	int ret;
379
+
380
+	reg_ctrl = RKRNG_CTRL_SW_DRNG_REQ;
381
+
382
+	rk_rng_writel(rk_rng, HIWORD_UPDATE(reg_ctrl, 0xffff, 0), RKRNG_CTRL);
383
+
384
+	ret = readl_poll_timeout(rk_rng->mem + RKRNG_STATE, reg_ctrl,
385
+				 (reg_ctrl & RKRNG_STATE_SW_DRNG_ACK),
386
+				 ROCKCHIP_POLL_PERIOD_US,
387
+				 ROCKCHIP_POLL_TIMEOUT_US);
388
+
389
+	if (ret)
390
+		goto exit;
391
+
392
+	rk_rng_writel(rk_rng, reg_ctrl, RKRNG_STATE);
393
+
394
+	ret = min_t(size_t, max, RK_MAX_RNG_BYTE);
395
+
396
+	rk_rng_read_regs(rk_rng, RKRNG_DRNG_DATA_0, buf, ret);
397
+
398
+exit:
399
+	/* close TRNG */
400
+	rk_rng_writel(rk_rng, HIWORD_UPDATE(0, 0xffff, 0), RKRNG_CTRL);
401
+
402
+	return ret;
403
+}
404
+
405
+static const struct rk_rng_soc_data crypto_v1_soc_data = {
349406 	.default_offset = 0,
350407 
351
-	.rk_rng_read = rk_crypto_v1_read,
408
+	.rk_rng_read = crypto_v1_read,
352409 };
353410 
354
-static const struct rk_rng_soc_data rk_crypto_v2_soc_data = {
411
+static const struct rk_rng_soc_data crypto_v2_soc_data = {
355412 	.default_offset = CRYPTO_V2_RNG_DEFAULT_OFFSET,
356413 
357
-	.rk_rng_read = rk_crypto_v2_read,
414
+	.rk_rng_read = crypto_v2_read,
358415 };
359416 
360
-static const struct rk_rng_soc_data rk_trng_v1_soc_data = {
417
+static const struct rk_rng_soc_data trng_v1_soc_data = {
361418 	.default_offset = 0,
362419 
363
-	.rk_rng_init = rk_trng_v1_init,
364
-	.rk_rng_read = rk_trng_v1_read,
420
+	.rk_rng_init = trng_v1_init,
421
+	.rk_rng_read = trng_v1_read,
422
+};
423
+
424
+static const struct rk_rng_soc_data rkrng_soc_data = {
425
+	.default_offset = 0,
426
+
427
+	.rk_rng_init = rkrng_init,
428
+	.rk_rng_read = rkrng_read,
365429 };
366430 
367431 static const struct of_device_id rk_rng_dt_match[] = {
368432 	{
369433 		.compatible = "rockchip,cryptov1-rng",
370
-		.data = (void *)&rk_crypto_v1_soc_data,
434
+		.data = (void *)&crypto_v1_soc_data,
371435 	},
372436 	{
373437 		.compatible = "rockchip,cryptov2-rng",
374
-		.data = (void *)&rk_crypto_v2_soc_data,
438
+		.data = (void *)&crypto_v2_soc_data,
375439 	},
376440 	{
377441 		.compatible = "rockchip,trngv1",
378
-		.data = (void *)&rk_trng_v1_soc_data,
442
+		.data = (void *)&trng_v1_soc_data,
443
+	},
444
+		{
445
+		.compatible = "rockchip,rkrng",
446
+		.data = (void *)&rkrng_soc_data,
379447 	},
380448 	{ },
381449 };
....@@ -445,9 +513,15 @@
445513 	}
446514 
447515 	/* for some platform need hardware operation when probe */
448
-	if (rk_rng->soc_data->rk_rng_init)
516
+	if (rk_rng->soc_data->rk_rng_init) {
517
+		pm_runtime_get_sync(rk_rng->dev);
518
+
449519 		ret = rk_rng->soc_data->rk_rng_init(&rk_rng->rng);
450520 
521
+		pm_runtime_mark_last_busy(rk_rng->dev);
522
+		pm_runtime_put_sync_autosuspend(rk_rng->dev);
523
+	}
524
+
451525 	return ret;
452526 }
453527