rk3568 rt init

hc

2023-11-06 e3e12f52b214121840b44c91de5b3e5af5d3eb84

 kernel/arch/arm/plat-versatile/platsmp.c
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@@ -32,7 +32,7 @@
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 	sync_cache_w(&pen_release);
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 }
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-static DEFINE_SPINLOCK(boot_lock);
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+static DEFINE_RAW_SPINLOCK(boot_lock);
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 void versatile_secondary_init(unsigned int cpu)
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 {
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@@ -45,8 +45,8 @@
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 	/*
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 	 * Synchronise with the boot thread.
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 	 */
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-	spin_lock(&boot_lock);
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-	spin_unlock(&boot_lock);
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+	raw_spin_lock(&boot_lock);
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+	raw_spin_unlock(&boot_lock);
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 }
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 int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)
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@@ -57,7 +57,7 @@
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 	 * Set synchronisation state between this boot processor
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 	 * and the secondary one
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 	 */
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-	spin_lock(&boot_lock);
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+	raw_spin_lock(&boot_lock);
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 	/*
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 	 * This is really belt and braces; we hold unintended secondary
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@@ -87,7 +87,7 @@
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 	 * now the secondary core is starting up let it run its
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 	 * calibrations, then wait for it to finish
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 	 */
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-	spin_unlock(&boot_lock);
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+	raw_spin_unlock(&boot_lock);
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 	return pen_release != -1 ? -ENOSYS : 0;
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 }