hc
2023-11-06 e3e12f52b214121840b44c91de5b3e5af5d3eb84
kernel/arch/arm/mach-spear/platsmp.c
....@@ -32,7 +32,7 @@
3232 sync_cache_w(&pen_release);
3333 }
3434
35
-static DEFINE_SPINLOCK(boot_lock);
35
+static DEFINE_RAW_SPINLOCK(boot_lock);
3636
3737 static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
3838
....@@ -47,8 +47,8 @@
4747 /*
4848 * Synchronise with the boot thread.
4949 */
50
- spin_lock(&boot_lock);
51
- spin_unlock(&boot_lock);
50
+ raw_spin_lock(&boot_lock);
51
+ raw_spin_unlock(&boot_lock);
5252 }
5353
5454 static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
....@@ -59,7 +59,7 @@
5959 * set synchronisation state between this boot processor
6060 * and the secondary one
6161 */
62
- spin_lock(&boot_lock);
62
+ raw_spin_lock(&boot_lock);
6363
6464 /*
6565 * The secondary processor is waiting to be released from
....@@ -84,7 +84,7 @@
8484 * now the secondary core is starting up let it run its
8585 * calibrations, then wait for it to finish
8686 */
87
- spin_unlock(&boot_lock);
87
+ raw_spin_unlock(&boot_lock);
8888
8989 return pen_release != -1 ? -ENOSYS : 0;
9090 }