.. | .. |
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22 | 22 | |
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23 | 23 | static void __iomem *clk_base; |
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24 | 24 | |
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25 | | -static DEFINE_SPINLOCK(boot_lock); |
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| 25 | +static DEFINE_RAW_SPINLOCK(boot_lock); |
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26 | 26 | |
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27 | 27 | static void sirfsoc_secondary_init(unsigned int cpu) |
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28 | 28 | { |
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.. | .. |
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36 | 36 | /* |
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37 | 37 | * Synchronise with the boot thread. |
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38 | 38 | */ |
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39 | | - spin_lock(&boot_lock); |
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40 | | - spin_unlock(&boot_lock); |
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| 39 | + raw_spin_lock(&boot_lock); |
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| 40 | + raw_spin_unlock(&boot_lock); |
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41 | 41 | } |
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42 | 42 | |
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43 | 43 | static const struct of_device_id clk_ids[] = { |
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.. | .. |
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75 | 75 | /* make sure write buffer is drained */ |
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76 | 76 | mb(); |
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77 | 77 | |
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78 | | - spin_lock(&boot_lock); |
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| 78 | + raw_spin_lock(&boot_lock); |
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79 | 79 | |
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80 | 80 | /* |
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81 | 81 | * The secondary processor is waiting to be released from |
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.. | .. |
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107 | 107 | * now the secondary core is starting up let it run its |
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108 | 108 | * calibrations, then wait for it to finish |
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109 | 109 | */ |
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110 | | - spin_unlock(&boot_lock); |
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| 110 | + raw_spin_unlock(&boot_lock); |
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111 | 111 | |
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112 | 112 | return pen_release != -1 ? -ENOSYS : 0; |
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113 | 113 | } |
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