rk3568 rt init

hc

2023-11-06 e3e12f52b214121840b44c91de5b3e5af5d3eb84

 kernel/arch/arm/mach-exynos/platsmp.c
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@@ -239,7 +239,7 @@
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 	sync_cache_w(&pen_release);
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 }
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-static DEFINE_SPINLOCK(boot_lock);
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+static DEFINE_RAW_SPINLOCK(boot_lock);
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 static void exynos_secondary_init(unsigned int cpu)
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 {
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@@ -252,8 +252,8 @@
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 	/*
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 	 * Synchronise with the boot thread.
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 	 */
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-	spin_lock(&boot_lock);
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-	spin_unlock(&boot_lock);
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+	raw_spin_lock(&boot_lock);
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+	raw_spin_unlock(&boot_lock);
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 }
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 int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr)
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@@ -317,7 +317,7 @@
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 	 * Set synchronisation state between this boot processor
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 	 * and the secondary one
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 	 */
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-	spin_lock(&boot_lock);
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+	raw_spin_lock(&boot_lock);
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 	/*
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 	 * The secondary processor is waiting to be released from
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@@ -344,7 +344,7 @@
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 		if (timeout == 0) {
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 			printk(KERN_ERR "cpu1 power enable failed");
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-			spin_unlock(&boot_lock);
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+			raw_spin_unlock(&boot_lock);
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 			return -ETIMEDOUT;
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 		}
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 	}
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@@ -390,7 +390,7 @@
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 	 * calibrations, then wait for it to finish
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 	 */
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 fail:
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-	spin_unlock(&boot_lock);
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+	raw_spin_unlock(&boot_lock);
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 	return pen_release != -1 ? ret : 0;
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 }