| .. | .. |
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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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| 1 | 2 | /* |
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| 2 | 3 | * linux/arch/arm/kernel/iwmmxt.S |
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| 3 | 4 | * |
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| .. | .. |
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| 8 | 9 | * |
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| 9 | 10 | * Full lazy switching support, optimizations and more, by Nicolas Pitre |
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| 10 | 11 | * Copyright (c) 2003-2004, MontaVista Software, Inc. |
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| 11 | | - * |
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| 12 | | - * This program is free software; you can redistribute it and/or modify |
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| 13 | | - * it under the terms of the GNU General Public License version 2 as |
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| 14 | | - * published by the Free Software Foundation. |
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| 15 | 12 | */ |
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| 16 | 13 | |
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| 17 | 14 | #include <linux/linkage.h> |
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| .. | .. |
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| 19 | 16 | #include <asm/thread_info.h> |
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| 20 | 17 | #include <asm/asm-offsets.h> |
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| 21 | 18 | #include <asm/assembler.h> |
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| 19 | +#include "iwmmxt.h" |
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| 22 | 20 | |
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| 23 | 21 | #if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B) |
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| 24 | 22 | #define PJ4(code...) code |
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| .. | .. |
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| 116 | 114 | |
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| 117 | 115 | concan_dump: |
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| 118 | 116 | |
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| 119 | | - wstrw wCSSF, [r1, #MMX_WCSSF] |
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| 120 | | - wstrw wCASF, [r1, #MMX_WCASF] |
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| 121 | | - wstrw wCGR0, [r1, #MMX_WCGR0] |
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| 122 | | - wstrw wCGR1, [r1, #MMX_WCGR1] |
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| 123 | | - wstrw wCGR2, [r1, #MMX_WCGR2] |
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| 124 | | - wstrw wCGR3, [r1, #MMX_WCGR3] |
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| 117 | + wstrw wCSSF, r1, MMX_WCSSF |
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| 118 | + wstrw wCASF, r1, MMX_WCASF |
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| 119 | + wstrw wCGR0, r1, MMX_WCGR0 |
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| 120 | + wstrw wCGR1, r1, MMX_WCGR1 |
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| 121 | + wstrw wCGR2, r1, MMX_WCGR2 |
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| 122 | + wstrw wCGR3, r1, MMX_WCGR3 |
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| 125 | 123 | |
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| 126 | 124 | 1: @ MUP? wRn |
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| 127 | 125 | tst r2, #0x2 |
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| 128 | 126 | beq 2f |
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| 129 | 127 | |
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| 130 | | - wstrd wR0, [r1, #MMX_WR0] |
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| 131 | | - wstrd wR1, [r1, #MMX_WR1] |
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| 132 | | - wstrd wR2, [r1, #MMX_WR2] |
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| 133 | | - wstrd wR3, [r1, #MMX_WR3] |
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| 134 | | - wstrd wR4, [r1, #MMX_WR4] |
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| 135 | | - wstrd wR5, [r1, #MMX_WR5] |
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| 136 | | - wstrd wR6, [r1, #MMX_WR6] |
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| 137 | | - wstrd wR7, [r1, #MMX_WR7] |
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| 138 | | - wstrd wR8, [r1, #MMX_WR8] |
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| 139 | | - wstrd wR9, [r1, #MMX_WR9] |
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| 140 | | - wstrd wR10, [r1, #MMX_WR10] |
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| 141 | | - wstrd wR11, [r1, #MMX_WR11] |
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| 142 | | - wstrd wR12, [r1, #MMX_WR12] |
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| 143 | | - wstrd wR13, [r1, #MMX_WR13] |
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| 144 | | - wstrd wR14, [r1, #MMX_WR14] |
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| 145 | | - wstrd wR15, [r1, #MMX_WR15] |
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| 128 | + wstrd wR0, r1, MMX_WR0 |
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| 129 | + wstrd wR1, r1, MMX_WR1 |
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| 130 | + wstrd wR2, r1, MMX_WR2 |
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| 131 | + wstrd wR3, r1, MMX_WR3 |
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| 132 | + wstrd wR4, r1, MMX_WR4 |
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| 133 | + wstrd wR5, r1, MMX_WR5 |
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| 134 | + wstrd wR6, r1, MMX_WR6 |
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| 135 | + wstrd wR7, r1, MMX_WR7 |
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| 136 | + wstrd wR8, r1, MMX_WR8 |
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| 137 | + wstrd wR9, r1, MMX_WR9 |
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| 138 | + wstrd wR10, r1, MMX_WR10 |
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| 139 | + wstrd wR11, r1, MMX_WR11 |
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| 140 | + wstrd wR12, r1, MMX_WR12 |
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| 141 | + wstrd wR13, r1, MMX_WR13 |
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| 142 | + wstrd wR14, r1, MMX_WR14 |
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| 143 | + wstrd wR15, r1, MMX_WR15 |
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| 146 | 144 | |
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| 147 | 145 | 2: teq r0, #0 @ anything to load? |
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| 148 | 146 | reteq lr @ if not, return |
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| .. | .. |
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| 150 | 148 | concan_load: |
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| 151 | 149 | |
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| 152 | 150 | @ Load wRn |
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| 153 | | - wldrd wR0, [r0, #MMX_WR0] |
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| 154 | | - wldrd wR1, [r0, #MMX_WR1] |
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| 155 | | - wldrd wR2, [r0, #MMX_WR2] |
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| 156 | | - wldrd wR3, [r0, #MMX_WR3] |
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| 157 | | - wldrd wR4, [r0, #MMX_WR4] |
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| 158 | | - wldrd wR5, [r0, #MMX_WR5] |
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| 159 | | - wldrd wR6, [r0, #MMX_WR6] |
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| 160 | | - wldrd wR7, [r0, #MMX_WR7] |
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| 161 | | - wldrd wR8, [r0, #MMX_WR8] |
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| 162 | | - wldrd wR9, [r0, #MMX_WR9] |
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| 163 | | - wldrd wR10, [r0, #MMX_WR10] |
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| 164 | | - wldrd wR11, [r0, #MMX_WR11] |
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| 165 | | - wldrd wR12, [r0, #MMX_WR12] |
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| 166 | | - wldrd wR13, [r0, #MMX_WR13] |
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| 167 | | - wldrd wR14, [r0, #MMX_WR14] |
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| 168 | | - wldrd wR15, [r0, #MMX_WR15] |
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| 151 | + wldrd wR0, r0, MMX_WR0 |
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| 152 | + wldrd wR1, r0, MMX_WR1 |
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| 153 | + wldrd wR2, r0, MMX_WR2 |
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| 154 | + wldrd wR3, r0, MMX_WR3 |
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| 155 | + wldrd wR4, r0, MMX_WR4 |
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| 156 | + wldrd wR5, r0, MMX_WR5 |
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| 157 | + wldrd wR6, r0, MMX_WR6 |
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| 158 | + wldrd wR7, r0, MMX_WR7 |
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| 159 | + wldrd wR8, r0, MMX_WR8 |
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| 160 | + wldrd wR9, r0, MMX_WR9 |
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| 161 | + wldrd wR10, r0, MMX_WR10 |
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| 162 | + wldrd wR11, r0, MMX_WR11 |
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| 163 | + wldrd wR12, r0, MMX_WR12 |
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| 164 | + wldrd wR13, r0, MMX_WR13 |
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| 165 | + wldrd wR14, r0, MMX_WR14 |
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| 166 | + wldrd wR15, r0, MMX_WR15 |
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| 169 | 167 | |
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| 170 | 168 | @ Load wCx |
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| 171 | | - wldrw wCSSF, [r0, #MMX_WCSSF] |
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| 172 | | - wldrw wCASF, [r0, #MMX_WCASF] |
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| 173 | | - wldrw wCGR0, [r0, #MMX_WCGR0] |
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| 174 | | - wldrw wCGR1, [r0, #MMX_WCGR1] |
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| 175 | | - wldrw wCGR2, [r0, #MMX_WCGR2] |
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| 176 | | - wldrw wCGR3, [r0, #MMX_WCGR3] |
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| 169 | + wldrw wCSSF, r0, MMX_WCSSF |
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| 170 | + wldrw wCASF, r0, MMX_WCASF |
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| 171 | + wldrw wCGR0, r0, MMX_WCGR0 |
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| 172 | + wldrw wCGR1, r0, MMX_WCGR1 |
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| 173 | + wldrw wCGR2, r0, MMX_WCGR2 |
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| 174 | + wldrw wCGR3, r0, MMX_WCGR3 |
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| 177 | 175 | |
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| 178 | 176 | @ clear CUP/MUP (only if r1 != 0) |
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| 179 | 177 | teq r1, #0 |
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