kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/arm/boot/dts/uniphier-pro5.dtsi
..
..
@@ -131,7 +131,7 @@
131
131
 		ranges;
132
132
 		interrupt-parent = <&intc>;
133
133
 
134
-		l2: l2-cache@500c0000 {
134
+		l2: cache-controller@500c0000 {
135
135
 			compatible = "socionext,uniphier-system-cache";
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 			reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
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137
 			      <0x506c0000 0x400>;
..
..
@@ -144,7 +144,7 @@
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 			next-level-cache = <&l3>;
145
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 		};
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146
 
147
-		l3: l3-cache@500c8000 {
147
+		l3: cache-controller@500c8000 {
148
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 			compatible = "socionext,uniphier-system-cache";
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 			reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
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 			      <0x506c8000 0x400>;
..
..
@@ -154,6 +154,32 @@
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 			cache-sets = <512>;
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155
 			cache-line-size = <256>;
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 			cache-level = <3>;
157
+		};
158
+
159
+		spi0: spi@54006000 {
160
+			compatible = "socionext,uniphier-scssi";
161
+			status = "disabled";
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+			reg = <0x54006000 0x100>;
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+			interrupts = <0 39 4>;
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+			pinctrl-names = "default";
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+			pinctrl-0 = <&pinctrl_spi0>;
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+			clocks = <&peri_clk 11>;
169
+			resets = <&peri_rst 11>;
170
+		};
171
+
172
+		spi1: spi@54006100 {
173
+			compatible = "socionext,uniphier-scssi";
174
+			status = "disabled";
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+			reg = <0x54006100 0x100>;
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+			interrupts = <0 216 4>;
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+			pinctrl-names = "default";
180
+			pinctrl-0 = <&pinctrl_spi1>;
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+			clocks = <&peri_clk 11>;	/* common with spi0 */
182
+			resets = <&peri_rst 12>;
157
183
 		};
158
184
 
159
185
 		serial0: serial@54006800 {
..
..
@@ -386,7 +412,15 @@
386
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 			};
387
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 		};
388
414
 
389
-		aidet: aidet@5fc20000 {
415
+		xdmac: dma-controller@5fc10000 {
416
+			compatible = "socionext,uniphier-xdmac";
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+			reg = <0x5fc10000 0x5300>;
418
+			interrupts = <0 188 4>;
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+			dma-channels = <16>;
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+			#dma-cells = <2>;
421
+		};
422
+
423
+		aidet: interrupt-controller@5fc20000 {
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 			compatible = "socionext,uniphier-pro5-aidet";
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 			reg = <0x5fc20000 0x200>;
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 			interrupt-controller;
..
..
@@ -431,16 +465,232 @@
431
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 			};
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 		};
433
467
 
434
-		nand: nand@68000000 {
468
+		usb0: usb@65a00000 {
469
+			compatible = "socionext,uniphier-dwc3", "snps,dwc3";
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+			status = "disabled";
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+			reg = <0x65a00000 0xcd00>;
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+			interrupt-names = "host";
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+			interrupts = <0 134 4>;
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+			pinctrl-names = "default";
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+			pinctrl-0 = <&pinctrl_usb0>;
476
+			clock-names = "ref", "bus_early", "suspend";
477
+			clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
478
+			resets = <&usb0_rst 15>;
479
+			phys = <&usb0_hsphy0>, <&usb0_ssphy0>;
480
+			dr_mode = "host";
481
+		};
482
+
483
+		usb-glue@65b00000 {
484
+			compatible = "socionext,uniphier-pro5-dwc3-glue",
485
+				     "simple-mfd";
486
+			#address-cells = <1>;
487
+			#size-cells = <1>;
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+			ranges = <0 0x65b00000 0x400>;
489
+
490
+			usb0_rst: reset@0 {
491
+				compatible = "socionext,uniphier-pro5-usb3-reset";
492
+				reg = <0x0 0x4>;
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+				#reset-cells = <1>;
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+				clock-names = "gio", "link";
495
+				clocks = <&sys_clk 12>, <&sys_clk 14>;
496
+				reset-names = "gio", "link";
497
+				resets = <&sys_rst 12>, <&sys_rst 14>;
498
+			};
499
+
500
+			usb0_vbus0: regulator@100 {
501
+				compatible = "socionext,uniphier-pro5-usb3-regulator";
502
+				reg = <0x100 0x10>;
503
+				clock-names = "gio", "link";
504
+				clocks = <&sys_clk 12>, <&sys_clk 14>;
505
+				reset-names = "gio", "link";
506
+				resets = <&sys_rst 12>, <&sys_rst 14>;
507
+			};
508
+
509
+			usb0_hsphy0: hs-phy@280 {
510
+				compatible = "socionext,uniphier-pro5-usb3-hsphy";
511
+				reg = <0x280 0x10>;
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+				#phy-cells = <0>;
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+				clock-names = "gio", "link";
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+				clocks = <&sys_clk 12>, <&sys_clk 14>;
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+				reset-names = "gio", "link";
516
+				resets = <&sys_rst 12>, <&sys_rst 14>;
517
+				vbus-supply = <&usb0_vbus0>;
518
+			};
519
+
520
+			usb0_ssphy0: ss-phy@380 {
521
+				compatible = "socionext,uniphier-pro5-usb3-ssphy";
522
+				reg = <0x380 0x10>;
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+				#phy-cells = <0>;
524
+				clock-names = "gio", "link";
525
+				clocks = <&sys_clk 12>, <&sys_clk 14>;
526
+				reset-names = "gio", "link";
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+				resets = <&sys_rst 12>, <&sys_rst 14>;
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+				vbus-supply = <&usb0_vbus0>;
529
+			};
530
+		};
531
+
532
+		usb1: usb@65c00000 {
533
+			compatible = "socionext,uniphier-dwc3", "snps,dwc3";
534
+			status = "disabled";
535
+			reg = <0x65c00000 0xcd00>;
536
+			interrupt-names = "host";
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+			interrupts = <0 137 4>;
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+			pinctrl-names = "default";
539
+			pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>;
540
+			clock-names = "ref", "bus_early", "suspend";
541
+			clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
542
+			resets = <&usb1_rst 15>;
543
+			phys = <&usb1_hsphy0>, <&usb1_hsphy1>, <&usb1_ssphy0>;
544
+			dr_mode = "host";
545
+		};
546
+
547
+		usb-glue@65d00000 {
548
+			compatible = "socionext,uniphier-pro5-dwc3-glue",
549
+				     "simple-mfd";
550
+			#address-cells = <1>;
551
+			#size-cells = <1>;
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+			ranges = <0 0x65d00000 0x400>;
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+
554
+			usb1_rst: reset@0 {
555
+				compatible = "socionext,uniphier-pro5-usb3-reset";
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+				reg = <0x0 0x4>;
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+				#reset-cells = <1>;
558
+				clock-names = "gio", "link";
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+				clocks = <&sys_clk 12>, <&sys_clk 15>;
560
+				reset-names = "gio", "link";
561
+				resets = <&sys_rst 12>, <&sys_rst 15>;
562
+			};
563
+
564
+			usb1_vbus0: regulator@100 {
565
+				compatible = "socionext,uniphier-pro5-usb3-regulator";
566
+				reg = <0x100 0x10>;
567
+				clock-names = "gio", "link";
568
+				clocks = <&sys_clk 12>, <&sys_clk 15>;
569
+				reset-names = "gio", "link";
570
+				resets = <&sys_rst 12>, <&sys_rst 15>;
571
+			};
572
+
573
+			usb1_vbus1: regulator@110 {
574
+				compatible = "socionext,uniphier-pro5-usb3-regulator";
575
+				reg = <0x110 0x10>;
576
+				clock-names = "gio", "link";
577
+				clocks = <&sys_clk 12>, <&sys_clk 15>;
578
+				reset-names = "gio", "link";
579
+				resets = <&sys_rst 12>, <&sys_rst 15>;
580
+			};
581
+
582
+			usb1_hsphy0: hs-phy@280 {
583
+				compatible = "socionext,uniphier-pro5-usb3-hsphy";
584
+				reg = <0x280 0x10>;
585
+				#phy-cells = <0>;
586
+				clock-names = "gio", "link";
587
+				clocks = <&sys_clk 12>, <&sys_clk 15>;
588
+				reset-names = "gio", "link";
589
+				resets = <&sys_rst 12>, <&sys_rst 15>;
590
+				vbus-supply = <&usb1_vbus0>;
591
+			};
592
+
593
+			usb1_hsphy1: hs-phy@290 {
594
+				compatible = "socionext,uniphier-pro5-usb3-hsphy";
595
+				reg = <0x290 0x10>;
596
+				#phy-cells = <0>;
597
+				clock-names = "gio", "link";
598
+				clocks = <&sys_clk 12>, <&sys_clk 15>;
599
+				reset-names = "gio", "link";
600
+				resets = <&sys_rst 12>, <&sys_rst 15>;
601
+				vbus-supply = <&usb1_vbus1>;
602
+			};
603
+
604
+			usb1_ssphy0: ss-phy@380 {
605
+				compatible = "socionext,uniphier-pro5-usb3-ssphy";
606
+				reg = <0x380 0x10>;
607
+				#phy-cells = <0>;
608
+				clock-names = "gio", "link";
609
+				clocks = <&sys_clk 12>, <&sys_clk 15>;
610
+				reset-names = "gio", "link";
611
+				resets = <&sys_rst 12>, <&sys_rst 15>;
612
+				vbus-supply = <&usb1_vbus0>;
613
+			};
614
+		};
615
+
616
+		pcie_ep: pcie-ep@66000000 {
617
+			compatible = "socionext,uniphier-pro5-pcie-ep",
618
+				     "snps,dw-pcie-ep";
619
+			status = "disabled";
620
+			reg-names = "dbi", "dbi2", "link", "addr_space";
621
+			reg = <0x66000000 0x1000>, <0x66001000 0x1000>,
622
+			      <0x66010000 0x10000>, <0x67000000 0x400000>;
623
+			pinctrl-names = "default";
624
+			pinctrl-0 = <&pinctrl_pcie>;
625
+			clock-names = "gio", "link";
626
+			clocks = <&sys_clk 12>, <&sys_clk 24>;
627
+			reset-names = "gio", "link";
628
+			resets = <&sys_rst 12>, <&sys_rst 24>;
629
+			num-ib-windows = <16>;
630
+			num-ob-windows = <16>;
631
+			num-lanes = <4>;
632
+			phy-names = "pcie-phy";
633
+			phys = <&pcie_phy>;
634
+		};
635
+
636
+		pcie_phy: phy@66038000 {
637
+			compatible = "socionext,uniphier-pro5-pcie-phy";
638
+			reg = <0x66038000 0x4000>;
639
+			#phy-cells = <0>;
640
+			clock-names = "gio", "link";
641
+			clocks = <&sys_clk 12>, <&sys_clk 24>;
642
+			reset-names = "gio", "link";
643
+			resets = <&sys_rst 12>, <&sys_rst 24>;
644
+		};
645
+
646
+		nand: nand-controller@68000000 {
435
647
 			compatible = "socionext,uniphier-denali-nand-v5b";
436
648
 			status = "disabled";
437
649
 			reg-names = "nand_data", "denali_reg";
438
650
 			reg = <0x68000000 0x20>, <0x68100000 0x1000>;
651
+			#address-cells = <1>;
652
+			#size-cells = <0>;
439
653
 			interrupts = <0 65 4>;
440
654
 			pinctrl-names = "default";
441
-			pinctrl-0 = <&pinctrl_nand2cs>;
442
-			clocks = <&sys_clk 2>;
443
-			resets = <&sys_rst 2>;
655
+			pinctrl-0 = <&pinctrl_nand>;
656
+			clock-names = "nand", "nand_x", "ecc";
657
+			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
658
+			reset-names = "nand", "reg";
659
+			resets = <&sys_rst 2>, <&sys_rst 2>;
660
+		};
661
+
662
+		emmc: mmc@68400000 {
663
+			compatible = "socionext,uniphier-sd-v3.1";
664
+			status = "disabled";
665
+			reg = <0x68400000 0x800>;
666
+			interrupts = <0 78 4>;
667
+			pinctrl-names = "default";
668
+			pinctrl-0 = <&pinctrl_emmc>;
669
+			clocks = <&sd_clk 1>;
670
+			reset-names = "host", "hw";
671
+			resets = <&sd_rst 1>, <&sd_rst 6>;
672
+			bus-width = <8>;
673
+			cap-mmc-highspeed;
674
+			cap-mmc-hw-reset;
675
+			non-removable;
676
+		};
677
+
678
+		sd: mmc@68800000 {
679
+			compatible = "socionext,uniphier-sd-v3.1";
680
+			status = "disabled";
681
+			reg = <0x68800000 0x800>;
682
+			interrupts = <0 76 4>;
683
+			pinctrl-names = "default", "uhs";
684
+			pinctrl-0 = <&pinctrl_sd>;
685
+			pinctrl-1 = <&pinctrl_sd_uhs>;
686
+			clocks = <&sd_clk 0>;
687
+			reset-names = "host";
688
+			resets = <&sd_rst 0>;
689
+			bus-width = <4>;
690
+			cap-sd-highspeed;
691
+			sd-uhs-sdr12;
692
+			sd-uhs-sdr25;
693
+			sd-uhs-sdr50;
444
694
 		};
445
695
 	};
446
696
 };