hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f
kernel/arch/arm/boot/dts/imx53.dtsi
....@@ -1,14 +1,7 @@
1
-/*
2
- * Copyright 2011 Freescale Semiconductor, Inc.
3
- * Copyright 2011 Linaro Ltd.
4
- *
5
- * The code contained herein is licensed under the GNU General Public
6
- * License. You may obtain a copy of the GNU General Public License
7
- * Version 2 or later at the following locations:
8
- *
9
- * http://www.opensource.org/licenses/gpl-license.html
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- * http://www.gnu.org/copyleft/gpl.html
11
- */
1
+// SPDX-License-Identifier: GPL-2.0+
2
+//
3
+// Copyright 2011 Freescale Semiconductor, Inc.
4
+// Copyright 2011 Linaro Ltd.
125
136 #include "imx53-pinfunc.h"
147 #include <dt-bindings/clock/imx5-clock.h>
....@@ -38,6 +31,7 @@
3831 i2c0 = &i2c1;
3932 i2c1 = &i2c2;
4033 i2c2 = &i2c3;
34
+ ipu0 = &ipu;
4135 mmc0 = &esdhc1;
4236 mmc1 = &esdhc2;
4337 mmc2 = &esdhc3;
....@@ -76,6 +70,11 @@
7670 display-subsystem {
7771 compatible = "fsl,imx-display-subsystem";
7872 ports = <&ipu_di0>, <&ipu_di1>;
73
+ };
74
+
75
+ capture_subsystem {
76
+ compatible = "fsl,imx-capture-subsystem";
77
+ ports = <&ipu_csi0>, <&ipu_csi1>;
7978 };
8079
8180 tzic: tz-interrupt-controller@fffc000 {
....@@ -165,10 +164,16 @@
165164
166165 ipu_csi0: port@0 {
167166 reg = <0>;
167
+
168
+ ipu_csi0_from_parallel_sensor: endpoint {
169
+ };
168170 };
169171
170172 ipu_csi1: port@1 {
171173 reg = <1>;
174
+
175
+ ipu_csi1_from_parallel_sensor: endpoint {
176
+ };
172177 };
173178
174179 ipu_di0: port@2 {
....@@ -207,7 +212,17 @@
207212 };
208213 };
209214
210
- aips@50000000 { /* AIPS1 */
215
+ gpu: gpu@30000000 {
216
+ compatible = "amd,imageon-200.0", "amd,imageon";
217
+ reg = <0x30000000 0x20000>;
218
+ reg-names = "kgsl_3d0_reg_memory";
219
+ interrupts = <12>;
220
+ interrupt-names = "kgsl_3d0_irq";
221
+ clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
222
+ clock-names = "core_clk", "mem_iface_clk";
223
+ };
224
+
225
+ bus@50000000 { /* AIPS1 */
211226 compatible = "fsl,aips-bus", "simple-bus";
212227 #address-cells = <1>;
213228 #size-cells = <1>;
....@@ -221,7 +236,7 @@
221236 reg = <0x50000000 0x40000>;
222237 ranges;
223238
224
- esdhc1: esdhc@50004000 {
239
+ esdhc1: mmc@50004000 {
225240 compatible = "fsl,imx53-esdhc";
226241 reg = <0x50004000 0x4000>;
227242 interrupts = <1>;
....@@ -233,7 +248,7 @@
233248 status = "disabled";
234249 };
235250
236
- esdhc2: esdhc@50008000 {
251
+ esdhc2: mmc@50008000 {
237252 compatible = "fsl,imx53-esdhc";
238253 reg = <0x50008000 0x4000>;
239254 interrupts = <2>;
....@@ -257,7 +272,7 @@
257272 status = "disabled";
258273 };
259274
260
- ecspi1: ecspi@50010000 {
275
+ ecspi1: spi@50010000 {
261276 #address-cells = <1>;
262277 #size-cells = <0>;
263278 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
....@@ -286,7 +301,7 @@
286301 status = "disabled";
287302 };
288303
289
- esdhc3: esdhc@50020000 {
304
+ esdhc3: mmc@50020000 {
290305 compatible = "fsl,imx53-esdhc";
291306 reg = <0x50020000 0x4000>;
292307 interrupts = <3>;
....@@ -298,7 +313,7 @@
298313 status = "disabled";
299314 };
300315
301
- esdhc4: esdhc@50024000 {
316
+ esdhc4: mmc@50024000 {
302317 compatible = "fsl,imx53-esdhc";
303318 reg = <0x50024000 0x4000>;
304319 interrupts = <4>;
....@@ -510,7 +525,7 @@
510525 };
511526
512527 pwm1: pwm@53fb4000 {
513
- #pwm-cells = <2>;
528
+ #pwm-cells = <3>;
514529 compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
515530 reg = <0x53fb4000 0x4000>;
516531 clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
....@@ -520,7 +535,7 @@
520535 };
521536
522537 pwm2: pwm@53fb8000 {
523
- #pwm-cells = <2>;
538
+ #pwm-cells = <3>;
524539 compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
525540 reg = <0x53fb8000 0x4000>;
526541 clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,
....@@ -573,9 +588,10 @@
573588 status = "disabled";
574589 };
575590
576
- src: src@53fd0000 {
591
+ src: reset-controller@53fd0000 {
577592 compatible = "fsl,imx53-src", "fsl,imx51-src";
578593 reg = <0x53fd0000 0x4000>;
594
+ interrupts = <75>;
579595 #reset-cells = <1>;
580596 };
581597
....@@ -639,7 +655,7 @@
639655 };
640656 };
641657
642
- aips@60000000 { /* AIPS2 */
658
+ bus@60000000 { /* AIPS2 */
643659 compatible = "fsl,aips-bus", "simple-bus";
644660 #address-cells = <1>;
645661 #size-cells = <1>;
....@@ -651,7 +667,7 @@
651667 reg = <0x63f00000 0x60>;
652668 };
653669
654
- iim: iim@63f98000 {
670
+ iim: efuse@63f98000 {
655671 compatible = "fsl,imx53-iim", "fsl,imx27-iim";
656672 reg = <0x63f98000 0x4000>;
657673 interrupts = <69>;
....@@ -682,7 +698,7 @@
682698 status = "disabled";
683699 };
684700
685
- ecspi2: ecspi@63fac000 {
701
+ ecspi2: spi@63fac000 {
686702 #address-cells = <1>;
687703 #size-cells = <0>;
688704 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
....@@ -705,7 +721,7 @@
705721 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
706722 };
707723
708
- cspi: cspi@63fc0000 {
724
+ cspi: spi@63fc0000 {
709725 #address-cells = <1>;
710726 #size-cells = <0>;
711727 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";