update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/video/rockchip/rga3/rga_common.c
..
..
@@ -529,20 +529,49 @@
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 	}
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 }
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-const char *rga_get_blend_mode_str(uint16_t alpha_rop_flag,
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-				   uint16_t alpha_mode_0,
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-				   uint16_t alpha_mode_1)
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+const char *rga_get_blend_mode_str(enum rga_alpha_blend_mode mode)
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 {
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-	if (alpha_rop_flag == 0) {
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+	switch (mode) {
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+	case RGA_ALPHA_NONE:
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 		return "no blend";
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-	} else if (alpha_rop_flag == 0x9) {
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-		if (alpha_mode_0 == 0x381A && alpha_mode_1 == 0x381A)
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-			return "105 src + (1-src.a)*dst";
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-		else if (alpha_mode_0 == 0x483A && alpha_mode_1 == 0x483A)
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-			return "405 src.a * src + (1-src.a) * dst";
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-		else
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-			return "check reg for more imformation";
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-	} else {
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+
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+	case RGA_ALPHA_BLEND_SRC:
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+		return "src";
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+
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+	case RGA_ALPHA_BLEND_DST:
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+		return "dst";
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+
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+	case RGA_ALPHA_BLEND_SRC_OVER:
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+		return "src-over";
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+
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+	case RGA_ALPHA_BLEND_DST_OVER:
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+		return "dst-over";
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+
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+	case RGA_ALPHA_BLEND_SRC_IN:
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+		return "src-in";
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+
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+	case RGA_ALPHA_BLEND_DST_IN:
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+		return "dst-in";
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+
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+	case RGA_ALPHA_BLEND_SRC_OUT:
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+		return "src-out";
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+
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+	case RGA_ALPHA_BLEND_DST_OUT:
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+		return "dst-out";
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+
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+	case RGA_ALPHA_BLEND_SRC_ATOP:
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+		return "src-atop";
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+
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+	case RGA_ALPHA_BLEND_DST_ATOP:
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+		return "dst-atop";
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+
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+	case RGA_ALPHA_BLEND_XOR:
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+		return "xor";
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+
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+	case RGA_ALPHA_BLEND_CLEAR:
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+		return "clear";
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+
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+	default:
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 		return "check reg for more imformation";
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 	}
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 }
..
..
@@ -575,6 +604,20 @@
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 	}
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 }
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+const char *rga_get_core_name(enum RGA_SCHEDULER_CORE core)
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+{
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+	switch (core) {
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+	case RGA_SCHEDULER_RGA3_CORE0:
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+		return "RGA3_core0";
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+	case RGA_SCHEDULER_RGA3_CORE1:
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+		return "RGA3_core1";
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+	case RGA_SCHEDULER_RGA2_CORE0:
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+		return "RGA2_core0";
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+	default:
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+		return "unknown_core";
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+	}
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+}
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+
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 void rga_convert_addr(struct rga_img_info_t *img, bool before_vir_get_channel)
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 {
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 	/*