.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | #define VERSION "0.23" |
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2 | 3 | /* ns83820.c by Benjamin LaHaise with contributions. |
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3 | 4 | * |
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.. | .. |
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9 | 10 | * Copyright 2001, 2002 Red Hat. |
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10 | 11 | * |
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11 | 12 | * Mmmm, chocolate vanilla mocha... |
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12 | | - * |
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13 | | - * |
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14 | | - * This program is free software; you can redistribute it and/or modify |
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15 | | - * it under the terms of the GNU General Public License as published by |
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16 | | - * the Free Software Foundation; either version 2 of the License, or |
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17 | | - * (at your option) any later version. |
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18 | | - * |
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19 | | - * This program is distributed in the hope that it will be useful, |
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20 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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21 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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22 | | - * GNU General Public License for more details. |
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23 | | - * |
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24 | | - * You should have received a copy of the GNU General Public License |
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25 | | - * along with this program; if not, see <http://www.gnu.org/licenses/>. |
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26 | | - * |
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27 | 13 | * |
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28 | 14 | * ChangeLog |
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29 | 15 | * ========= |
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.. | .. |
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540 | 526 | |
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541 | 527 | dev->rx_info.next_empty = (next_empty + 1) % NR_RX_DESC; |
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542 | 528 | cmdsts = REAL_RX_BUF_SIZE | CMDSTS_INTR; |
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543 | | - buf = pci_map_single(dev->pci_dev, skb->data, |
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544 | | - REAL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
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| 529 | + buf = dma_map_single(&dev->pci_dev->dev, skb->data, REAL_RX_BUF_SIZE, |
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| 530 | + DMA_FROM_DEVICE); |
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545 | 531 | build_rx_desc(dev, sg, 0, buf, cmdsts, 0); |
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546 | 532 | /* update link of previous rx */ |
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547 | 533 | if (likely(next_empty != dev->rx_info.next_rx)) |
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.. | .. |
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614 | 600 | struct ns83820 *dev = PRIV(ndev); |
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615 | 601 | static const char *speeds[] = { "10", "100", "1000", "1000(?)", "1000F" }; |
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616 | 602 | u32 cfg, new_cfg; |
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617 | | - u32 tbisr, tanar, tanlpar; |
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| 603 | + u32 tanar, tanlpar; |
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618 | 604 | int speed, fullduplex, newlinkstate; |
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619 | 605 | |
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620 | 606 | cfg = readl(dev->base + CFG) ^ SPDSTS_POLARITY; |
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621 | 607 | |
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622 | 608 | if (dev->CFG_cache & CFG_TBI_EN) { |
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| 609 | + u32 __maybe_unused tbisr; |
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| 610 | + |
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623 | 611 | /* we have an optical transceiver */ |
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624 | 612 | tbisr = readl(dev->base + TBISR); |
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625 | 613 | tanar = readl(dev->base + TANAR); |
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.. | .. |
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872 | 860 | mb(); |
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873 | 861 | clear_rx_desc(dev, next_rx); |
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874 | 862 | |
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875 | | - pci_unmap_single(dev->pci_dev, bufptr, |
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876 | | - RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
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| 863 | + dma_unmap_single(&dev->pci_dev->dev, bufptr, RX_BUF_SIZE, |
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| 864 | + DMA_FROM_DEVICE); |
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877 | 865 | len = cmdsts & CMDSTS_LEN_MASK; |
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878 | 866 | #ifdef NS83820_VLAN_ACCEL_SUPPORT |
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879 | 867 | /* NH: As was mentioned below, this chip is kinda |
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.. | .. |
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937 | 925 | spin_unlock_irqrestore(&info->lock, flags); |
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938 | 926 | } |
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939 | 927 | |
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940 | | -static void rx_action(unsigned long _dev) |
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| 928 | +static void rx_action(struct tasklet_struct *t) |
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941 | 929 | { |
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942 | | - struct net_device *ndev = (void *)_dev; |
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943 | | - struct ns83820 *dev = PRIV(ndev); |
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| 930 | + struct ns83820 *dev = from_tasklet(dev, t, rx_tasklet); |
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| 931 | + struct net_device *ndev = dev->ndev; |
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944 | 932 | rx_irq(ndev); |
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945 | 933 | writel(ihr, dev->base + IHR); |
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946 | 934 | |
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.. | .. |
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999 | 987 | len = cmdsts & CMDSTS_LEN_MASK; |
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1000 | 988 | addr = desc_addr_get(desc + DESC_BUFPTR); |
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1001 | 989 | if (skb) { |
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1002 | | - pci_unmap_single(dev->pci_dev, |
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1003 | | - addr, |
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1004 | | - len, |
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1005 | | - PCI_DMA_TODEVICE); |
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1006 | | - dev_kfree_skb_irq(skb); |
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| 990 | + dma_unmap_single(&dev->pci_dev->dev, addr, len, |
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| 991 | + DMA_TO_DEVICE); |
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| 992 | + dev_consume_skb_irq(skb); |
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1007 | 993 | atomic_dec(&dev->nr_tx_skbs); |
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1008 | 994 | } else |
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1009 | | - pci_unmap_page(dev->pci_dev, |
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1010 | | - addr, |
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1011 | | - len, |
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1012 | | - PCI_DMA_TODEVICE); |
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| 995 | + dma_unmap_page(&dev->pci_dev->dev, addr, len, |
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| 996 | + DMA_TO_DEVICE); |
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1013 | 997 | |
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1014 | 998 | tx_done_idx = (tx_done_idx + 1) % NR_TX_DESC; |
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1015 | 999 | dev->tx_done_idx = tx_done_idx; |
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.. | .. |
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1037 | 1021 | dev->tx_skbs[i] = NULL; |
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1038 | 1022 | if (skb) { |
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1039 | 1023 | __le32 *desc = dev->tx_descs + (i * DESC_SIZE); |
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1040 | | - pci_unmap_single(dev->pci_dev, |
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1041 | | - desc_addr_get(desc + DESC_BUFPTR), |
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1042 | | - le32_to_cpu(desc[DESC_CMDSTS]) & CMDSTS_LEN_MASK, |
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1043 | | - PCI_DMA_TODEVICE); |
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| 1024 | + dma_unmap_single(&dev->pci_dev->dev, |
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| 1025 | + desc_addr_get(desc + DESC_BUFPTR), |
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| 1026 | + le32_to_cpu(desc[DESC_CMDSTS]) & CMDSTS_LEN_MASK, |
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| 1027 | + DMA_TO_DEVICE); |
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1044 | 1028 | dev_kfree_skb_irq(skb); |
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1045 | 1029 | atomic_dec(&dev->nr_tx_skbs); |
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1046 | 1030 | } |
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.. | .. |
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1135 | 1119 | len = skb->len; |
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1136 | 1120 | if (nr_frags) |
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1137 | 1121 | len -= skb->data_len; |
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1138 | | - buf = pci_map_single(dev->pci_dev, skb->data, len, PCI_DMA_TODEVICE); |
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| 1122 | + buf = dma_map_single(&dev->pci_dev->dev, skb->data, len, |
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| 1123 | + DMA_TO_DEVICE); |
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1139 | 1124 | |
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1140 | 1125 | first_desc = dev->tx_descs + (free_idx * DESC_SIZE); |
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1141 | 1126 | |
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.. | .. |
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1221 | 1206 | struct ethtool_link_ksettings *cmd) |
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1222 | 1207 | { |
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1223 | 1208 | struct ns83820 *dev = PRIV(ndev); |
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1224 | | - u32 cfg, tanar, tbicr; |
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| 1209 | + u32 cfg, tbicr; |
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1225 | 1210 | int fullduplex = 0; |
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1226 | 1211 | u32 supported; |
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1227 | 1212 | |
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.. | .. |
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1240 | 1225 | |
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1241 | 1226 | /* read current configuration */ |
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1242 | 1227 | cfg = readl(dev->base + CFG) ^ SPDSTS_POLARITY; |
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1243 | | - tanar = readl(dev->base + TANAR); |
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| 1228 | + readl(dev->base + TANAR); |
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1244 | 1229 | tbicr = readl(dev->base + TBICR); |
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1245 | 1230 | |
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1246 | 1231 | fullduplex = (cfg & CFG_DUPSTS) ? 1 : 0; |
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.. | .. |
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1563 | 1548 | return 0; |
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1564 | 1549 | } |
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1565 | 1550 | |
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1566 | | -static void ns83820_tx_timeout(struct net_device *ndev) |
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| 1551 | +static void ns83820_tx_timeout(struct net_device *ndev, unsigned int txqueue) |
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1567 | 1552 | { |
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1568 | 1553 | struct ns83820 *dev = PRIV(ndev); |
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1569 | 1554 | u32 tx_done_idx; |
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.. | .. |
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1617 | 1602 | ndev->name, |
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1618 | 1603 | dev->tx_done_idx, dev->tx_free_idx, |
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1619 | 1604 | atomic_read(&dev->nr_tx_skbs)); |
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1620 | | - ns83820_tx_timeout(ndev); |
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| 1605 | + ns83820_tx_timeout(ndev, UINT_MAX); |
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1621 | 1606 | } |
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1622 | 1607 | |
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1623 | 1608 | mod_timer(&dev->tx_watchdog, jiffies + 2*HZ); |
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.. | .. |
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1869 | 1854 | static void ns83820_probe_phy(struct net_device *ndev) |
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1870 | 1855 | { |
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1871 | 1856 | struct ns83820 *dev = PRIV(ndev); |
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1872 | | - static int first; |
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1873 | | - int i; |
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1874 | | -#define MII_PHYIDR1 0x02 |
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1875 | | -#define MII_PHYIDR2 0x03 |
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| 1857 | + int j; |
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| 1858 | + unsigned a, b; |
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1876 | 1859 | |
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1877 | | -#if 0 |
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1878 | | - if (!first) { |
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1879 | | - unsigned tmp; |
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1880 | | - ns83820_mii_read_reg(dev, 1, 0x09); |
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1881 | | - ns83820_mii_write_reg(dev, 1, 0x10, 0x0d3e); |
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1882 | | - |
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1883 | | - tmp = ns83820_mii_read_reg(dev, 1, 0x00); |
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1884 | | - ns83820_mii_write_reg(dev, 1, 0x00, tmp | 0x8000); |
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1885 | | - udelay(1300); |
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1886 | | - ns83820_mii_read_reg(dev, 1, 0x09); |
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| 1860 | + for (j = 0; j < 0x16; j += 4) { |
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| 1861 | + dprintk("%s: [0x%02x] %04x %04x %04x %04x\n", |
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| 1862 | + ndev->name, j, |
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| 1863 | + ns83820_mii_read_reg(dev, 1, 0 + j), |
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| 1864 | + ns83820_mii_read_reg(dev, 1, 1 + j), |
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| 1865 | + ns83820_mii_read_reg(dev, 1, 2 + j), |
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| 1866 | + ns83820_mii_read_reg(dev, 1, 3 + j) |
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| 1867 | + ); |
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1887 | 1868 | } |
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1888 | | -#endif |
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1889 | | - first = 1; |
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1890 | 1869 | |
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1891 | | - for (i=1; i<2; i++) { |
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1892 | | - int j; |
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1893 | | - unsigned a, b; |
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1894 | | - a = ns83820_mii_read_reg(dev, i, MII_PHYIDR1); |
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1895 | | - b = ns83820_mii_read_reg(dev, i, MII_PHYIDR2); |
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| 1870 | + /* read firmware version: memory addr is 0x8402 and 0x8403 */ |
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| 1871 | + ns83820_mii_write_reg(dev, 1, 0x16, 0x000d); |
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| 1872 | + ns83820_mii_write_reg(dev, 1, 0x1e, 0x810e); |
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| 1873 | + a = ns83820_mii_read_reg(dev, 1, 0x1d); |
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1896 | 1874 | |
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1897 | | - //printk("%s: phy %d: 0x%04x 0x%04x\n", |
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1898 | | - // ndev->name, i, a, b); |
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1899 | | - |
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1900 | | - for (j=0; j<0x16; j+=4) { |
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1901 | | - dprintk("%s: [0x%02x] %04x %04x %04x %04x\n", |
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1902 | | - ndev->name, j, |
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1903 | | - ns83820_mii_read_reg(dev, i, 0 + j), |
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1904 | | - ns83820_mii_read_reg(dev, i, 1 + j), |
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1905 | | - ns83820_mii_read_reg(dev, i, 2 + j), |
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1906 | | - ns83820_mii_read_reg(dev, i, 3 + j) |
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1907 | | - ); |
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1908 | | - } |
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1909 | | - } |
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1910 | | - { |
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1911 | | - unsigned a, b; |
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1912 | | - /* read firmware version: memory addr is 0x8402 and 0x8403 */ |
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1913 | | - ns83820_mii_write_reg(dev, 1, 0x16, 0x000d); |
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1914 | | - ns83820_mii_write_reg(dev, 1, 0x1e, 0x810e); |
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1915 | | - a = ns83820_mii_read_reg(dev, 1, 0x1d); |
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1916 | | - |
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1917 | | - ns83820_mii_write_reg(dev, 1, 0x16, 0x000d); |
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1918 | | - ns83820_mii_write_reg(dev, 1, 0x1e, 0x810e); |
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1919 | | - b = ns83820_mii_read_reg(dev, 1, 0x1d); |
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1920 | | - dprintk("version: 0x%04x 0x%04x\n", a, b); |
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1921 | | - } |
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| 1875 | + ns83820_mii_write_reg(dev, 1, 0x16, 0x000d); |
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| 1876 | + ns83820_mii_write_reg(dev, 1, 0x1e, 0x810e); |
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| 1877 | + b = ns83820_mii_read_reg(dev, 1, 0x1d); |
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| 1878 | + dprintk("version: 0x%04x 0x%04x\n", a, b); |
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1922 | 1879 | } |
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1923 | 1880 | #endif |
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1924 | 1881 | |
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.. | .. |
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1944 | 1901 | |
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1945 | 1902 | /* See if we can set the dma mask early on; failure is fatal. */ |
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1946 | 1903 | if (sizeof(dma_addr_t) == 8 && |
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1947 | | - !pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64))) { |
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| 1904 | + !dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(64))) { |
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1948 | 1905 | using_dac = 1; |
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1949 | | - } else if (!pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32))) { |
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| 1906 | + } else if (!dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) { |
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1950 | 1907 | using_dac = 0; |
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1951 | 1908 | } else { |
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1952 | | - dev_warn(&pci_dev->dev, "pci_set_dma_mask failed!\n"); |
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| 1909 | + dev_warn(&pci_dev->dev, "dma_set_mask failed!\n"); |
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1953 | 1910 | return -ENODEV; |
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1954 | 1911 | } |
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1955 | 1912 | |
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.. | .. |
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1969 | 1926 | SET_NETDEV_DEV(ndev, &pci_dev->dev); |
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1970 | 1927 | |
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1971 | 1928 | INIT_WORK(&dev->tq_refill, queue_refill); |
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1972 | | - tasklet_init(&dev->rx_tasklet, rx_action, (unsigned long)ndev); |
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| 1929 | + tasklet_setup(&dev->rx_tasklet, rx_action); |
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1973 | 1930 | |
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1974 | 1931 | err = pci_enable_device(pci_dev); |
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1975 | 1932 | if (err) { |
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.. | .. |
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1979 | 1936 | |
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1980 | 1937 | pci_set_master(pci_dev); |
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1981 | 1938 | addr = pci_resource_start(pci_dev, 1); |
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1982 | | - dev->base = ioremap_nocache(addr, PAGE_SIZE); |
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1983 | | - dev->tx_descs = pci_alloc_consistent(pci_dev, |
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1984 | | - 4 * DESC_SIZE * NR_TX_DESC, &dev->tx_phy_descs); |
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1985 | | - dev->rx_info.descs = pci_alloc_consistent(pci_dev, |
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1986 | | - 4 * DESC_SIZE * NR_RX_DESC, &dev->rx_info.phy_descs); |
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| 1939 | + dev->base = ioremap(addr, PAGE_SIZE); |
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| 1940 | + dev->tx_descs = dma_alloc_coherent(&pci_dev->dev, |
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| 1941 | + 4 * DESC_SIZE * NR_TX_DESC, |
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| 1942 | + &dev->tx_phy_descs, GFP_KERNEL); |
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| 1943 | + dev->rx_info.descs = dma_alloc_coherent(&pci_dev->dev, |
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| 1944 | + 4 * DESC_SIZE * NR_RX_DESC, |
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| 1945 | + &dev->rx_info.phy_descs, GFP_KERNEL); |
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1987 | 1946 | err = -ENOMEM; |
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1988 | 1947 | if (!dev->base || !dev->tx_descs || !dev->rx_info.descs) |
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1989 | 1948 | goto out_disable; |
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.. | .. |
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2225 | 2184 | out_disable: |
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2226 | 2185 | if (dev->base) |
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2227 | 2186 | iounmap(dev->base); |
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2228 | | - pci_free_consistent(pci_dev, 4 * DESC_SIZE * NR_TX_DESC, dev->tx_descs, dev->tx_phy_descs); |
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2229 | | - pci_free_consistent(pci_dev, 4 * DESC_SIZE * NR_RX_DESC, dev->rx_info.descs, dev->rx_info.phy_descs); |
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| 2187 | + dma_free_coherent(&pci_dev->dev, 4 * DESC_SIZE * NR_TX_DESC, |
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| 2188 | + dev->tx_descs, dev->tx_phy_descs); |
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| 2189 | + dma_free_coherent(&pci_dev->dev, 4 * DESC_SIZE * NR_RX_DESC, |
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| 2190 | + dev->rx_info.descs, dev->rx_info.phy_descs); |
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2230 | 2191 | pci_disable_device(pci_dev); |
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2231 | 2192 | out_free: |
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2232 | 2193 | free_netdev(ndev); |
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.. | .. |
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2247 | 2208 | unregister_netdev(ndev); |
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2248 | 2209 | free_irq(dev->pci_dev->irq, ndev); |
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2249 | 2210 | iounmap(dev->base); |
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2250 | | - pci_free_consistent(dev->pci_dev, 4 * DESC_SIZE * NR_TX_DESC, |
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2251 | | - dev->tx_descs, dev->tx_phy_descs); |
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2252 | | - pci_free_consistent(dev->pci_dev, 4 * DESC_SIZE * NR_RX_DESC, |
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2253 | | - dev->rx_info.descs, dev->rx_info.phy_descs); |
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| 2211 | + dma_free_coherent(&dev->pci_dev->dev, 4 * DESC_SIZE * NR_TX_DESC, |
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| 2212 | + dev->tx_descs, dev->tx_phy_descs); |
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| 2213 | + dma_free_coherent(&dev->pci_dev->dev, 4 * DESC_SIZE * NR_RX_DESC, |
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| 2214 | + dev->rx_info.descs, dev->rx_info.phy_descs); |
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2254 | 2215 | pci_disable_device(dev->pci_dev); |
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2255 | 2216 | free_netdev(ndev); |
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2256 | 2217 | } |
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