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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * The file intends to implement the platform dependent EEH operations on pseries. |
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3 | 4 | * Actually, the pseries platform is built based on RTAS heavily. That means the |
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.. | .. |
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9 | 10 | * Copyright IBM Corporation 2001, 2005, 2006 |
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10 | 11 | * Copyright Dave Engebretsen & Todd Inglett 2001 |
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11 | 12 | * Copyright Linas Vepstas 2005, 2006 |
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12 | | - * |
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13 | | - * This program is free software; you can redistribute it and/or modify |
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14 | | - * it under the terms of the GNU General Public License as published by |
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15 | | - * the Free Software Foundation; either version 2 of the License, or |
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16 | | - * (at your option) any later version. |
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17 | | - * |
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18 | | - * This program is distributed in the hope that it will be useful, |
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19 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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20 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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21 | | - * GNU General Public License for more details. |
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22 | | - * |
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23 | | - * You should have received a copy of the GNU General Public License |
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24 | | - * along with this program; if not, write to the Free Software |
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25 | | - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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26 | 13 | */ |
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27 | 14 | |
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28 | 15 | #include <linux/atomic.h> |
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.. | .. |
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37 | 24 | #include <linux/sched.h> |
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38 | 25 | #include <linux/seq_file.h> |
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39 | 26 | #include <linux/spinlock.h> |
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| 27 | +#include <linux/crash_dump.h> |
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40 | 28 | |
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41 | 29 | #include <asm/eeh.h> |
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42 | 30 | #include <asm/eeh_event.h> |
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.. | .. |
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55 | 43 | static int ibm_get_config_addr_info2; |
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56 | 44 | static int ibm_configure_pe; |
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57 | 45 | |
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58 | | -#ifdef CONFIG_PCI_IOV |
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59 | 46 | void pseries_pcibios_bus_add_device(struct pci_dev *pdev) |
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60 | 47 | { |
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61 | 48 | struct pci_dn *pdn = pci_get_pdn(pdev); |
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62 | | - struct pci_dn *physfn_pdn; |
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63 | | - struct eeh_dev *edev; |
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64 | 49 | |
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65 | | - if (!pdev->is_virtfn) |
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| 50 | + if (eeh_has_flag(EEH_FORCE_DISABLED)) |
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66 | 51 | return; |
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67 | 52 | |
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68 | | - pdn->device_id = pdev->device; |
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69 | | - pdn->vendor_id = pdev->vendor; |
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70 | | - pdn->class_code = pdev->class; |
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71 | | - /* |
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72 | | - * Last allow unfreeze return code used for retrieval |
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73 | | - * by user space in eeh-sysfs to show the last command |
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74 | | - * completion from platform. |
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75 | | - */ |
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76 | | - pdn->last_allow_rc = 0; |
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77 | | - physfn_pdn = pci_get_pdn(pdev->physfn); |
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78 | | - pdn->pe_number = physfn_pdn->pe_num_map[pdn->vf_index]; |
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79 | | - edev = pdn_to_eeh_dev(pdn); |
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80 | | - |
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81 | | - /* |
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82 | | - * The following operations will fail if VF's sysfs files |
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83 | | - * aren't created or its resources aren't finalized. |
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84 | | - */ |
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85 | | - eeh_add_device_early(pdn); |
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86 | | - eeh_add_device_late(pdev); |
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87 | | - edev->pe_config_addr = (pdn->busno << 16) | (pdn->devfn << 8); |
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88 | | - eeh_rmv_from_parent_pe(edev); /* Remove as it is adding to bus pe */ |
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89 | | - eeh_add_to_parent_pe(edev); /* Add as VF PE type */ |
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90 | | - eeh_sysfs_add_device(pdev); |
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91 | | - |
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92 | | -} |
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| 53 | + dev_dbg(&pdev->dev, "EEH: Setting up device\n"); |
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| 54 | +#ifdef CONFIG_PCI_IOV |
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| 55 | + if (pdev->is_virtfn) { |
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| 56 | + pdn->device_id = pdev->device; |
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| 57 | + pdn->vendor_id = pdev->vendor; |
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| 58 | + pdn->class_code = pdev->class; |
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| 59 | + /* |
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| 60 | + * Last allow unfreeze return code used for retrieval |
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| 61 | + * by user space in eeh-sysfs to show the last command |
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| 62 | + * completion from platform. |
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| 63 | + */ |
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| 64 | + pdn->last_allow_rc = 0; |
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| 65 | + } |
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93 | 66 | #endif |
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| 67 | + pseries_eeh_init_edev(pdn); |
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| 68 | +#ifdef CONFIG_PCI_IOV |
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| 69 | + if (pdev->is_virtfn) { |
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| 70 | + /* |
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| 71 | + * FIXME: This really should be handled by choosing the right |
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| 72 | + * parent PE in in pseries_eeh_init_edev(). |
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| 73 | + */ |
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| 74 | + struct eeh_pe *physfn_pe = pci_dev_to_eeh_dev(pdev->physfn)->pe; |
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| 75 | + struct eeh_dev *edev = pdn_to_eeh_dev(pdn); |
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| 76 | + |
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| 77 | + edev->pe_config_addr = (pdn->busno << 16) | (pdn->devfn << 8); |
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| 78 | + eeh_pe_tree_remove(edev); /* Remove as it is adding to bus pe */ |
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| 79 | + eeh_pe_tree_insert(edev, physfn_pe); /* Add as VF PE type */ |
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| 80 | + } |
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| 81 | +#endif |
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| 82 | + eeh_probe_device(pdev); |
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| 83 | +} |
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| 84 | + |
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| 85 | + |
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| 86 | +/** |
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| 87 | + * pseries_eeh_get_pe_config_addr - Find the pe_config_addr for a device |
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| 88 | + * @pdn: pci_dn of the input device |
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| 89 | + * |
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| 90 | + * The EEH RTAS calls use a tuple consisting of: (buid_hi, buid_lo, |
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| 91 | + * pe_config_addr) as a handle to a given PE. This function finds the |
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| 92 | + * pe_config_addr based on the device's config addr. |
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| 93 | + * |
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| 94 | + * Keep in mind that the pe_config_addr *might* be numerically identical to the |
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| 95 | + * device's config addr, but the two are conceptually distinct. |
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| 96 | + * |
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| 97 | + * Returns the pe_config_addr, or a negative error code. |
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| 98 | + */ |
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| 99 | +static int pseries_eeh_get_pe_config_addr(struct pci_dn *pdn) |
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| 100 | +{ |
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| 101 | + int config_addr = rtas_config_addr(pdn->busno, pdn->devfn, 0); |
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| 102 | + struct pci_controller *phb = pdn->phb; |
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| 103 | + int ret, rets[3]; |
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| 104 | + |
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| 105 | + if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) { |
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| 106 | + /* |
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| 107 | + * First of all, use function 1 to determine if this device is |
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| 108 | + * part of a PE or not. ret[0] being zero indicates it's not. |
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| 109 | + */ |
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| 110 | + ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets, |
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| 111 | + config_addr, BUID_HI(phb->buid), |
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| 112 | + BUID_LO(phb->buid), 1); |
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| 113 | + if (ret || (rets[0] == 0)) |
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| 114 | + return -ENOENT; |
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| 115 | + |
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| 116 | + /* Retrieve the associated PE config address with function 0 */ |
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| 117 | + ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets, |
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| 118 | + config_addr, BUID_HI(phb->buid), |
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| 119 | + BUID_LO(phb->buid), 0); |
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| 120 | + if (ret) { |
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| 121 | + pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n", |
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| 122 | + __func__, phb->global_number, config_addr); |
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| 123 | + return -ENXIO; |
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| 124 | + } |
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| 125 | + |
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| 126 | + return rets[0]; |
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| 127 | + } |
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| 128 | + |
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| 129 | + if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) { |
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| 130 | + ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets, |
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| 131 | + config_addr, BUID_HI(phb->buid), |
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| 132 | + BUID_LO(phb->buid), 0); |
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| 133 | + if (ret) { |
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| 134 | + pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n", |
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| 135 | + __func__, phb->global_number, config_addr); |
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| 136 | + return -ENXIO; |
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| 137 | + } |
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| 138 | + |
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| 139 | + return rets[0]; |
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| 140 | + } |
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| 141 | + |
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| 142 | + /* |
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| 143 | + * PAPR does describe a process for finding the pe_config_addr that was |
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| 144 | + * used before the ibm,get-config-addr-info calls were added. However, |
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| 145 | + * I haven't found *any* systems that don't have that RTAS call |
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| 146 | + * implemented. If you happen to find one that needs the old DT based |
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| 147 | + * process, patches are welcome! |
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| 148 | + */ |
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| 149 | + return -ENOENT; |
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| 150 | +} |
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| 151 | + |
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| 152 | +/** |
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| 153 | + * pseries_eeh_phb_reset - Reset the specified PHB |
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| 154 | + * @phb: PCI controller |
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| 155 | + * @config_adddr: the associated config address |
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| 156 | + * @option: reset option |
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| 157 | + * |
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| 158 | + * Reset the specified PHB/PE |
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| 159 | + */ |
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| 160 | +static int pseries_eeh_phb_reset(struct pci_controller *phb, int config_addr, int option) |
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| 161 | +{ |
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| 162 | + int ret; |
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| 163 | + |
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| 164 | + /* Reset PE through RTAS call */ |
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| 165 | + ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL, |
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| 166 | + config_addr, BUID_HI(phb->buid), |
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| 167 | + BUID_LO(phb->buid), option); |
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| 168 | + |
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| 169 | + /* If fundamental-reset not supported, try hot-reset */ |
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| 170 | + if (option == EEH_RESET_FUNDAMENTAL && ret == -8) { |
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| 171 | + option = EEH_RESET_HOT; |
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| 172 | + ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL, |
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| 173 | + config_addr, BUID_HI(phb->buid), |
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| 174 | + BUID_LO(phb->buid), option); |
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| 175 | + } |
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| 176 | + |
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| 177 | + /* We need reset hold or settlement delay */ |
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| 178 | + if (option == EEH_RESET_FUNDAMENTAL || option == EEH_RESET_HOT) |
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| 179 | + msleep(EEH_PE_RST_HOLD_TIME); |
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| 180 | + else |
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| 181 | + msleep(EEH_PE_RST_SETTLE_TIME); |
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| 182 | + |
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| 183 | + return ret; |
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| 184 | +} |
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| 185 | + |
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| 186 | +/** |
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| 187 | + * pseries_eeh_phb_configure_bridge - Configure PCI bridges in the indicated PE |
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| 188 | + * @phb: PCI controller |
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| 189 | + * @config_adddr: the associated config address |
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| 190 | + * |
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| 191 | + * The function will be called to reconfigure the bridges included |
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| 192 | + * in the specified PE so that the mulfunctional PE would be recovered |
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| 193 | + * again. |
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| 194 | + */ |
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| 195 | +static int pseries_eeh_phb_configure_bridge(struct pci_controller *phb, int config_addr) |
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| 196 | +{ |
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| 197 | + int ret; |
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| 198 | + /* Waiting 0.2s maximum before skipping configuration */ |
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| 199 | + int max_wait = 200; |
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| 200 | + |
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| 201 | + while (max_wait > 0) { |
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| 202 | + ret = rtas_call(ibm_configure_pe, 3, 1, NULL, |
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| 203 | + config_addr, BUID_HI(phb->buid), |
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| 204 | + BUID_LO(phb->buid)); |
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| 205 | + |
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| 206 | + if (!ret) |
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| 207 | + return ret; |
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| 208 | + if (ret < 0) |
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| 209 | + break; |
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| 210 | + |
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| 211 | + /* |
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| 212 | + * If RTAS returns a delay value that's above 100ms, cut it |
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| 213 | + * down to 100ms in case firmware made a mistake. For more |
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| 214 | + * on how these delay values work see rtas_busy_delay_time |
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| 215 | + */ |
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| 216 | + if (ret > RTAS_EXTENDED_DELAY_MIN+2 && |
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| 217 | + ret <= RTAS_EXTENDED_DELAY_MAX) |
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| 218 | + ret = RTAS_EXTENDED_DELAY_MIN+2; |
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| 219 | + |
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| 220 | + max_wait -= rtas_busy_delay_time(ret); |
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| 221 | + |
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| 222 | + if (max_wait < 0) |
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| 223 | + break; |
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| 224 | + |
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| 225 | + rtas_busy_delay(ret); |
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| 226 | + } |
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| 227 | + |
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| 228 | + pr_warn("%s: Unable to configure bridge PHB#%x-PE#%x (%d)\n", |
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| 229 | + __func__, phb->global_number, config_addr, ret); |
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| 230 | + /* PAPR defines -3 as "Parameter Error" for this function: */ |
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| 231 | + if (ret == -3) |
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| 232 | + return -EINVAL; |
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| 233 | + else |
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| 234 | + return -EIO; |
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| 235 | +} |
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94 | 236 | |
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95 | 237 | /* |
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96 | 238 | * Buffer for reporting slot-error-detail rtas calls. Its here |
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.. | .. |
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100 | 242 | static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX]; |
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101 | 243 | static DEFINE_SPINLOCK(slot_errbuf_lock); |
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102 | 244 | static int eeh_error_buf_size; |
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103 | | - |
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104 | | -/** |
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105 | | - * pseries_eeh_init - EEH platform dependent initialization |
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106 | | - * |
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107 | | - * EEH platform dependent initialization on pseries. |
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108 | | - */ |
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109 | | -static int pseries_eeh_init(void) |
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110 | | -{ |
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111 | | - /* figure out EEH RTAS function call tokens */ |
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112 | | - ibm_set_eeh_option = rtas_token("ibm,set-eeh-option"); |
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113 | | - ibm_set_slot_reset = rtas_token("ibm,set-slot-reset"); |
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114 | | - ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2"); |
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115 | | - ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state"); |
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116 | | - ibm_slot_error_detail = rtas_token("ibm,slot-error-detail"); |
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117 | | - ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2"); |
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118 | | - ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info"); |
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119 | | - ibm_configure_pe = rtas_token("ibm,configure-pe"); |
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120 | | - |
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121 | | - /* |
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122 | | - * ibm,configure-pe and ibm,configure-bridge have the same semantics, |
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123 | | - * however ibm,configure-pe can be faster. If we can't find |
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124 | | - * ibm,configure-pe then fall back to using ibm,configure-bridge. |
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125 | | - */ |
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126 | | - if (ibm_configure_pe == RTAS_UNKNOWN_SERVICE) |
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127 | | - ibm_configure_pe = rtas_token("ibm,configure-bridge"); |
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128 | | - |
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129 | | - /* |
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130 | | - * Necessary sanity check. We needn't check "get-config-addr-info" |
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131 | | - * and its variant since the old firmware probably support address |
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132 | | - * of domain/bus/slot/function for EEH RTAS operations. |
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133 | | - */ |
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134 | | - if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE || |
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135 | | - ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE || |
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136 | | - (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE && |
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137 | | - ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE) || |
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138 | | - ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE || |
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139 | | - ibm_configure_pe == RTAS_UNKNOWN_SERVICE) { |
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140 | | - pr_info("EEH functionality not supported\n"); |
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141 | | - return -EINVAL; |
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142 | | - } |
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143 | | - |
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144 | | - /* Initialize error log lock and size */ |
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145 | | - spin_lock_init(&slot_errbuf_lock); |
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146 | | - eeh_error_buf_size = rtas_token("rtas-error-log-max"); |
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147 | | - if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) { |
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148 | | - pr_info("%s: unknown EEH error log size\n", |
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149 | | - __func__); |
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150 | | - eeh_error_buf_size = 1024; |
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151 | | - } else if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) { |
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152 | | - pr_info("%s: EEH error log size %d exceeds the maximal %d\n", |
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153 | | - __func__, eeh_error_buf_size, RTAS_ERROR_LOG_MAX); |
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154 | | - eeh_error_buf_size = RTAS_ERROR_LOG_MAX; |
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155 | | - } |
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156 | | - |
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157 | | - /* Set EEH probe mode */ |
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158 | | - eeh_add_flag(EEH_PROBE_MODE_DEVTREE | EEH_ENABLE_IO_FOR_LOG); |
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159 | | - |
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160 | | -#ifdef CONFIG_PCI_IOV |
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161 | | - /* Set EEH machine dependent code */ |
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162 | | - ppc_md.pcibios_bus_add_device = pseries_pcibios_bus_add_device; |
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163 | | -#endif |
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164 | | - |
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165 | | - return 0; |
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166 | | -} |
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167 | 245 | |
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168 | 246 | static int pseries_eeh_cap_start(struct pci_dn *pdn) |
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169 | 247 | { |
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.. | .. |
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235 | 313 | } |
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236 | 314 | |
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237 | 315 | /** |
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238 | | - * pseries_eeh_probe - EEH probe on the given device |
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239 | | - * @pdn: PCI device node |
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240 | | - * @data: Unused |
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| 316 | + * pseries_eeh_pe_get_parent - Retrieve the parent PE |
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| 317 | + * @edev: EEH device |
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241 | 318 | * |
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242 | | - * When EEH module is installed during system boot, all PCI devices |
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243 | | - * are checked one by one to see if it supports EEH. The function |
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244 | | - * is introduced for the purpose. |
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| 319 | + * The whole PEs existing in the system are organized as hierarchy |
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| 320 | + * tree. The function is used to retrieve the parent PE according |
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| 321 | + * to the parent EEH device. |
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245 | 322 | */ |
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246 | | -static void *pseries_eeh_probe(struct pci_dn *pdn, void *data) |
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| 323 | +static struct eeh_pe *pseries_eeh_pe_get_parent(struct eeh_dev *edev) |
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247 | 324 | { |
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| 325 | + struct eeh_dev *parent; |
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| 326 | + struct pci_dn *pdn = eeh_dev_to_pdn(edev); |
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| 327 | + |
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| 328 | + /* |
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| 329 | + * It might have the case for the indirect parent |
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| 330 | + * EEH device already having associated PE, but |
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| 331 | + * the direct parent EEH device doesn't have yet. |
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| 332 | + */ |
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| 333 | + if (edev->physfn) |
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| 334 | + pdn = pci_get_pdn(edev->physfn); |
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| 335 | + else |
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| 336 | + pdn = pdn ? pdn->parent : NULL; |
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| 337 | + while (pdn) { |
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| 338 | + /* We're poking out of PCI territory */ |
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| 339 | + parent = pdn_to_eeh_dev(pdn); |
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| 340 | + if (!parent) |
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| 341 | + return NULL; |
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| 342 | + |
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| 343 | + if (parent->pe) |
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| 344 | + return parent->pe; |
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| 345 | + |
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| 346 | + pdn = pdn->parent; |
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| 347 | + } |
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| 348 | + |
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| 349 | + return NULL; |
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| 350 | +} |
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| 351 | + |
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| 352 | +/** |
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| 353 | + * pseries_eeh_init_edev - initialise the eeh_dev and eeh_pe for a pci_dn |
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| 354 | + * |
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| 355 | + * @pdn: PCI device node |
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| 356 | + * |
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| 357 | + * When we discover a new PCI device via the device-tree we create a |
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| 358 | + * corresponding pci_dn and we allocate, but don't initialise, an eeh_dev. |
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| 359 | + * This function takes care of the initialisation and inserts the eeh_dev |
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| 360 | + * into the correct eeh_pe. If no eeh_pe exists we'll allocate one. |
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| 361 | + */ |
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| 362 | +void pseries_eeh_init_edev(struct pci_dn *pdn) |
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| 363 | +{ |
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| 364 | + struct eeh_pe pe, *parent; |
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248 | 365 | struct eeh_dev *edev; |
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249 | | - struct eeh_pe pe; |
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250 | 366 | u32 pcie_flags; |
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251 | | - int enable = 0; |
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252 | 367 | int ret; |
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253 | 368 | |
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254 | | - /* Retrieve OF node and eeh device */ |
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| 369 | + if (WARN_ON_ONCE(!eeh_has_flag(EEH_PROBE_MODE_DEVTREE))) |
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| 370 | + return; |
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| 371 | + |
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| 372 | + /* |
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| 373 | + * Find the eeh_dev for this pdn. The storage for the eeh_dev was |
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| 374 | + * allocated at the same time as the pci_dn. |
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| 375 | + * |
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| 376 | + * XXX: We should probably re-visit that. |
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| 377 | + */ |
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255 | 378 | edev = pdn_to_eeh_dev(pdn); |
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256 | | - if (!edev || edev->pe) |
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257 | | - return NULL; |
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| 379 | + if (!edev) |
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| 380 | + return; |
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| 381 | + |
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| 382 | + /* |
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| 383 | + * If ->pe is set then we've already probed this device. We hit |
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| 384 | + * this path when a pci_dev is removed and rescanned while recovering |
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| 385 | + * a PE (i.e. for devices where the driver doesn't support error |
---|
| 386 | + * recovery). |
---|
| 387 | + */ |
---|
| 388 | + if (edev->pe) |
---|
| 389 | + return; |
---|
258 | 390 | |
---|
259 | 391 | /* Check class/vendor/device IDs */ |
---|
260 | 392 | if (!pdn->vendor_id || !pdn->device_id || !pdn->class_code) |
---|
261 | | - return NULL; |
---|
| 393 | + return; |
---|
262 | 394 | |
---|
263 | 395 | /* Skip for PCI-ISA bridge */ |
---|
264 | 396 | if ((pdn->class_code >> 8) == PCI_CLASS_BRIDGE_ISA) |
---|
265 | | - return NULL; |
---|
| 397 | + return; |
---|
| 398 | + |
---|
| 399 | + eeh_edev_dbg(edev, "Probing device\n"); |
---|
266 | 400 | |
---|
267 | 401 | /* |
---|
268 | 402 | * Update class code and mode of eeh device. We need |
---|
269 | 403 | * correctly reflects that current device is root port |
---|
270 | 404 | * or PCIe switch downstream port. |
---|
271 | 405 | */ |
---|
272 | | - edev->class_code = pdn->class_code; |
---|
273 | 406 | edev->pcix_cap = pseries_eeh_find_cap(pdn, PCI_CAP_ID_PCIX); |
---|
274 | 407 | edev->pcie_cap = pseries_eeh_find_cap(pdn, PCI_CAP_ID_EXP); |
---|
275 | 408 | edev->aer_cap = pseries_eeh_find_ecap(pdn, PCI_EXT_CAP_ID_ERR); |
---|
276 | 409 | edev->mode &= 0xFFFFFF00; |
---|
277 | | - if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) { |
---|
| 410 | + if ((pdn->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) { |
---|
278 | 411 | edev->mode |= EEH_DEV_BRIDGE; |
---|
279 | 412 | if (edev->pcie_cap) { |
---|
280 | 413 | rtas_read_config(pdn, edev->pcie_cap + PCI_EXP_FLAGS, |
---|
.. | .. |
---|
287 | 420 | } |
---|
288 | 421 | } |
---|
289 | 422 | |
---|
290 | | - /* Initialize the fake PE */ |
---|
291 | | - memset(&pe, 0, sizeof(struct eeh_pe)); |
---|
292 | | - pe.phb = pdn->phb; |
---|
293 | | - pe.config_addr = (pdn->busno << 16) | (pdn->devfn << 8); |
---|
294 | | - |
---|
295 | | - /* Enable EEH on the device */ |
---|
296 | | - ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE); |
---|
297 | | - if (!ret) { |
---|
298 | | - /* Retrieve PE address */ |
---|
299 | | - edev->pe_config_addr = eeh_ops->get_pe_addr(&pe); |
---|
300 | | - pe.addr = edev->pe_config_addr; |
---|
301 | | - |
---|
302 | | - /* Some older systems (Power4) allow the ibm,set-eeh-option |
---|
303 | | - * call to succeed even on nodes where EEH is not supported. |
---|
304 | | - * Verify support explicitly. |
---|
305 | | - */ |
---|
306 | | - ret = eeh_ops->get_state(&pe, NULL); |
---|
307 | | - if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT) |
---|
308 | | - enable = 1; |
---|
309 | | - |
---|
310 | | - if (enable) { |
---|
311 | | - eeh_add_flag(EEH_ENABLED); |
---|
312 | | - eeh_add_to_parent_pe(edev); |
---|
313 | | - |
---|
314 | | - pr_debug("%s: EEH enabled on %02x:%02x.%01x PHB#%x-PE#%x\n", |
---|
315 | | - __func__, pdn->busno, PCI_SLOT(pdn->devfn), |
---|
316 | | - PCI_FUNC(pdn->devfn), pe.phb->global_number, |
---|
317 | | - pe.addr); |
---|
318 | | - } else if (pdn->parent && pdn_to_eeh_dev(pdn->parent) && |
---|
319 | | - (pdn_to_eeh_dev(pdn->parent))->pe) { |
---|
320 | | - /* This device doesn't support EEH, but it may have an |
---|
321 | | - * EEH parent, in which case we mark it as supported. |
---|
322 | | - */ |
---|
323 | | - edev->pe_config_addr = pdn_to_eeh_dev(pdn->parent)->pe_config_addr; |
---|
324 | | - eeh_add_to_parent_pe(edev); |
---|
325 | | - } |
---|
| 423 | + /* first up, find the pe_config_addr for the PE containing the device */ |
---|
| 424 | + ret = pseries_eeh_get_pe_config_addr(pdn); |
---|
| 425 | + if (ret < 0) { |
---|
| 426 | + eeh_edev_dbg(edev, "Unable to find pe_config_addr\n"); |
---|
| 427 | + goto err; |
---|
326 | 428 | } |
---|
327 | 429 | |
---|
328 | | - /* Save memory bars */ |
---|
329 | | - eeh_save_bars(edev); |
---|
| 430 | + /* Try enable EEH on the fake PE */ |
---|
| 431 | + memset(&pe, 0, sizeof(struct eeh_pe)); |
---|
| 432 | + pe.phb = pdn->phb; |
---|
| 433 | + pe.addr = ret; |
---|
330 | 434 | |
---|
331 | | - return NULL; |
---|
| 435 | + eeh_edev_dbg(edev, "Enabling EEH on device\n"); |
---|
| 436 | + ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE); |
---|
| 437 | + if (ret) { |
---|
| 438 | + eeh_edev_dbg(edev, "EEH failed to enable on device (code %d)\n", ret); |
---|
| 439 | + goto err; |
---|
| 440 | + } |
---|
| 441 | + |
---|
| 442 | + edev->pe_config_addr = pe.addr; |
---|
| 443 | + |
---|
| 444 | + eeh_add_flag(EEH_ENABLED); |
---|
| 445 | + |
---|
| 446 | + parent = pseries_eeh_pe_get_parent(edev); |
---|
| 447 | + eeh_pe_tree_insert(edev, parent); |
---|
| 448 | + eeh_save_bars(edev); |
---|
| 449 | + eeh_edev_dbg(edev, "EEH enabled for device"); |
---|
| 450 | + |
---|
| 451 | + return; |
---|
| 452 | + |
---|
| 453 | +err: |
---|
| 454 | + eeh_edev_dbg(edev, "EEH is unsupported on device (code = %d)\n", ret); |
---|
332 | 455 | } |
---|
| 456 | + |
---|
| 457 | +static struct eeh_dev *pseries_eeh_probe(struct pci_dev *pdev) |
---|
| 458 | +{ |
---|
| 459 | + struct eeh_dev *edev; |
---|
| 460 | + struct pci_dn *pdn; |
---|
| 461 | + |
---|
| 462 | + pdn = pci_get_pdn_by_devfn(pdev->bus, pdev->devfn); |
---|
| 463 | + if (!pdn) |
---|
| 464 | + return NULL; |
---|
| 465 | + |
---|
| 466 | + /* |
---|
| 467 | + * If the system supports EEH on this device then the eeh_dev was |
---|
| 468 | + * configured and inserted into a PE in pseries_eeh_init_edev() |
---|
| 469 | + */ |
---|
| 470 | + edev = pdn_to_eeh_dev(pdn); |
---|
| 471 | + if (!edev || !edev->pe) |
---|
| 472 | + return NULL; |
---|
| 473 | + |
---|
| 474 | + return edev; |
---|
| 475 | +} |
---|
| 476 | + |
---|
| 477 | +/** |
---|
| 478 | + * pseries_eeh_init_edev_recursive - Enable EEH for the indicated device |
---|
| 479 | + * @pdn: PCI device node |
---|
| 480 | + * |
---|
| 481 | + * This routine must be used to perform EEH initialization for the |
---|
| 482 | + * indicated PCI device that was added after system boot (e.g. |
---|
| 483 | + * hotplug, dlpar). |
---|
| 484 | + */ |
---|
| 485 | +void pseries_eeh_init_edev_recursive(struct pci_dn *pdn) |
---|
| 486 | +{ |
---|
| 487 | + struct pci_dn *n; |
---|
| 488 | + |
---|
| 489 | + if (!pdn) |
---|
| 490 | + return; |
---|
| 491 | + |
---|
| 492 | + list_for_each_entry(n, &pdn->child_list, list) |
---|
| 493 | + pseries_eeh_init_edev_recursive(n); |
---|
| 494 | + |
---|
| 495 | + pseries_eeh_init_edev(pdn); |
---|
| 496 | +} |
---|
| 497 | +EXPORT_SYMBOL_GPL(pseries_eeh_init_edev_recursive); |
---|
333 | 498 | |
---|
334 | 499 | /** |
---|
335 | 500 | * pseries_eeh_set_option - Initialize EEH or MMIO/DMA reenable |
---|
.. | .. |
---|
343 | 508 | static int pseries_eeh_set_option(struct eeh_pe *pe, int option) |
---|
344 | 509 | { |
---|
345 | 510 | int ret = 0; |
---|
346 | | - int config_addr; |
---|
347 | 511 | |
---|
348 | 512 | /* |
---|
349 | 513 | * When we're enabling or disabling EEH functioality on |
---|
.. | .. |
---|
356 | 520 | case EEH_OPT_ENABLE: |
---|
357 | 521 | case EEH_OPT_THAW_MMIO: |
---|
358 | 522 | case EEH_OPT_THAW_DMA: |
---|
359 | | - config_addr = pe->config_addr; |
---|
360 | | - if (pe->addr) |
---|
361 | | - config_addr = pe->addr; |
---|
362 | 523 | break; |
---|
363 | 524 | case EEH_OPT_FREEZE_PE: |
---|
364 | 525 | /* Not support */ |
---|
365 | 526 | return 0; |
---|
366 | 527 | default: |
---|
367 | | - pr_err("%s: Invalid option %d\n", |
---|
368 | | - __func__, option); |
---|
| 528 | + pr_err("%s: Invalid option %d\n", __func__, option); |
---|
369 | 529 | return -EINVAL; |
---|
370 | 530 | } |
---|
371 | 531 | |
---|
372 | 532 | ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL, |
---|
373 | | - config_addr, BUID_HI(pe->phb->buid), |
---|
| 533 | + pe->addr, BUID_HI(pe->phb->buid), |
---|
374 | 534 | BUID_LO(pe->phb->buid), option); |
---|
375 | | - |
---|
376 | | - return ret; |
---|
377 | | -} |
---|
378 | | - |
---|
379 | | -/** |
---|
380 | | - * pseries_eeh_get_pe_addr - Retrieve PE address |
---|
381 | | - * @pe: EEH PE |
---|
382 | | - * |
---|
383 | | - * Retrieve the assocated PE address. Actually, there're 2 RTAS |
---|
384 | | - * function calls dedicated for the purpose. We need implement |
---|
385 | | - * it through the new function and then the old one. Besides, |
---|
386 | | - * you should make sure the config address is figured out from |
---|
387 | | - * FDT node before calling the function. |
---|
388 | | - * |
---|
389 | | - * It's notable that zero'ed return value means invalid PE config |
---|
390 | | - * address. |
---|
391 | | - */ |
---|
392 | | -static int pseries_eeh_get_pe_addr(struct eeh_pe *pe) |
---|
393 | | -{ |
---|
394 | | - int ret = 0; |
---|
395 | | - int rets[3]; |
---|
396 | | - |
---|
397 | | - if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) { |
---|
398 | | - /* |
---|
399 | | - * First of all, we need to make sure there has one PE |
---|
400 | | - * associated with the device. Otherwise, PE address is |
---|
401 | | - * meaningless. |
---|
402 | | - */ |
---|
403 | | - ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets, |
---|
404 | | - pe->config_addr, BUID_HI(pe->phb->buid), |
---|
405 | | - BUID_LO(pe->phb->buid), 1); |
---|
406 | | - if (ret || (rets[0] == 0)) |
---|
407 | | - return 0; |
---|
408 | | - |
---|
409 | | - /* Retrieve the associated PE config address */ |
---|
410 | | - ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets, |
---|
411 | | - pe->config_addr, BUID_HI(pe->phb->buid), |
---|
412 | | - BUID_LO(pe->phb->buid), 0); |
---|
413 | | - if (ret) { |
---|
414 | | - pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n", |
---|
415 | | - __func__, pe->phb->global_number, pe->config_addr); |
---|
416 | | - return 0; |
---|
417 | | - } |
---|
418 | | - |
---|
419 | | - return rets[0]; |
---|
420 | | - } |
---|
421 | | - |
---|
422 | | - if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) { |
---|
423 | | - ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets, |
---|
424 | | - pe->config_addr, BUID_HI(pe->phb->buid), |
---|
425 | | - BUID_LO(pe->phb->buid), 0); |
---|
426 | | - if (ret) { |
---|
427 | | - pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n", |
---|
428 | | - __func__, pe->phb->global_number, pe->config_addr); |
---|
429 | | - return 0; |
---|
430 | | - } |
---|
431 | | - |
---|
432 | | - return rets[0]; |
---|
433 | | - } |
---|
434 | 535 | |
---|
435 | 536 | return ret; |
---|
436 | 537 | } |
---|
.. | .. |
---|
438 | 539 | /** |
---|
439 | 540 | * pseries_eeh_get_state - Retrieve PE state |
---|
440 | 541 | * @pe: EEH PE |
---|
441 | | - * @state: return value |
---|
| 542 | + * @delay: suggested time to wait if state is unavailable |
---|
442 | 543 | * |
---|
443 | 544 | * Retrieve the state of the specified PE. On RTAS compliant |
---|
444 | 545 | * pseries platform, there already has one dedicated RTAS function |
---|
.. | .. |
---|
448 | 549 | * RTAS calls for the purpose, we need to try the new one and back |
---|
449 | 550 | * to the old one if the new one couldn't work properly. |
---|
450 | 551 | */ |
---|
451 | | -static int pseries_eeh_get_state(struct eeh_pe *pe, int *state) |
---|
| 552 | +static int pseries_eeh_get_state(struct eeh_pe *pe, int *delay) |
---|
452 | 553 | { |
---|
453 | | - int config_addr; |
---|
454 | 554 | int ret; |
---|
455 | 555 | int rets[4]; |
---|
456 | 556 | int result; |
---|
457 | 557 | |
---|
458 | | - /* Figure out PE config address if possible */ |
---|
459 | | - config_addr = pe->config_addr; |
---|
460 | | - if (pe->addr) |
---|
461 | | - config_addr = pe->addr; |
---|
462 | | - |
---|
463 | 558 | if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) { |
---|
464 | 559 | ret = rtas_call(ibm_read_slot_reset_state2, 3, 4, rets, |
---|
465 | | - config_addr, BUID_HI(pe->phb->buid), |
---|
| 560 | + pe->addr, BUID_HI(pe->phb->buid), |
---|
466 | 561 | BUID_LO(pe->phb->buid)); |
---|
467 | 562 | } else if (ibm_read_slot_reset_state != RTAS_UNKNOWN_SERVICE) { |
---|
468 | 563 | /* Fake PE unavailable info */ |
---|
469 | 564 | rets[2] = 0; |
---|
470 | 565 | ret = rtas_call(ibm_read_slot_reset_state, 3, 3, rets, |
---|
471 | | - config_addr, BUID_HI(pe->phb->buid), |
---|
| 566 | + pe->addr, BUID_HI(pe->phb->buid), |
---|
472 | 567 | BUID_LO(pe->phb->buid)); |
---|
473 | 568 | } else { |
---|
474 | 569 | return EEH_STATE_NOT_SUPPORT; |
---|
.. | .. |
---|
499 | 594 | break; |
---|
500 | 595 | case 5: |
---|
501 | 596 | if (rets[2]) { |
---|
502 | | - if (state) *state = rets[2]; |
---|
| 597 | + if (delay) |
---|
| 598 | + *delay = rets[2]; |
---|
503 | 599 | result = EEH_STATE_UNAVAILABLE; |
---|
504 | 600 | } else { |
---|
505 | 601 | result = EEH_STATE_NOT_SUPPORT; |
---|
.. | .. |
---|
521 | 617 | */ |
---|
522 | 618 | static int pseries_eeh_reset(struct eeh_pe *pe, int option) |
---|
523 | 619 | { |
---|
524 | | - int config_addr; |
---|
525 | | - int ret; |
---|
526 | | - |
---|
527 | | - /* Figure out PE address */ |
---|
528 | | - config_addr = pe->config_addr; |
---|
529 | | - if (pe->addr) |
---|
530 | | - config_addr = pe->addr; |
---|
531 | | - |
---|
532 | | - /* Reset PE through RTAS call */ |
---|
533 | | - ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL, |
---|
534 | | - config_addr, BUID_HI(pe->phb->buid), |
---|
535 | | - BUID_LO(pe->phb->buid), option); |
---|
536 | | - |
---|
537 | | - /* If fundamental-reset not supported, try hot-reset */ |
---|
538 | | - if (option == EEH_RESET_FUNDAMENTAL && |
---|
539 | | - ret == -8) { |
---|
540 | | - option = EEH_RESET_HOT; |
---|
541 | | - ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL, |
---|
542 | | - config_addr, BUID_HI(pe->phb->buid), |
---|
543 | | - BUID_LO(pe->phb->buid), option); |
---|
544 | | - } |
---|
545 | | - |
---|
546 | | - /* We need reset hold or settlement delay */ |
---|
547 | | - if (option == EEH_RESET_FUNDAMENTAL || |
---|
548 | | - option == EEH_RESET_HOT) |
---|
549 | | - msleep(EEH_PE_RST_HOLD_TIME); |
---|
550 | | - else |
---|
551 | | - msleep(EEH_PE_RST_SETTLE_TIME); |
---|
552 | | - |
---|
553 | | - return ret; |
---|
554 | | -} |
---|
555 | | - |
---|
556 | | -/** |
---|
557 | | - * pseries_eeh_wait_state - Wait for PE state |
---|
558 | | - * @pe: EEH PE |
---|
559 | | - * @max_wait: maximal period in millisecond |
---|
560 | | - * |
---|
561 | | - * Wait for the state of associated PE. It might take some time |
---|
562 | | - * to retrieve the PE's state. |
---|
563 | | - */ |
---|
564 | | -static int pseries_eeh_wait_state(struct eeh_pe *pe, int max_wait) |
---|
565 | | -{ |
---|
566 | | - int ret; |
---|
567 | | - int mwait; |
---|
568 | | - |
---|
569 | | - /* |
---|
570 | | - * According to PAPR, the state of PE might be temporarily |
---|
571 | | - * unavailable. Under the circumstance, we have to wait |
---|
572 | | - * for indicated time determined by firmware. The maximal |
---|
573 | | - * wait time is 5 minutes, which is acquired from the original |
---|
574 | | - * EEH implementation. Also, the original implementation |
---|
575 | | - * also defined the minimal wait time as 1 second. |
---|
576 | | - */ |
---|
577 | | -#define EEH_STATE_MIN_WAIT_TIME (1000) |
---|
578 | | -#define EEH_STATE_MAX_WAIT_TIME (300 * 1000) |
---|
579 | | - |
---|
580 | | - while (1) { |
---|
581 | | - ret = pseries_eeh_get_state(pe, &mwait); |
---|
582 | | - |
---|
583 | | - /* |
---|
584 | | - * If the PE's state is temporarily unavailable, |
---|
585 | | - * we have to wait for the specified time. Otherwise, |
---|
586 | | - * the PE's state will be returned immediately. |
---|
587 | | - */ |
---|
588 | | - if (ret != EEH_STATE_UNAVAILABLE) |
---|
589 | | - return ret; |
---|
590 | | - |
---|
591 | | - if (max_wait <= 0) { |
---|
592 | | - pr_warn("%s: Timeout when getting PE's state (%d)\n", |
---|
593 | | - __func__, max_wait); |
---|
594 | | - return EEH_STATE_NOT_SUPPORT; |
---|
595 | | - } |
---|
596 | | - |
---|
597 | | - if (mwait <= 0) { |
---|
598 | | - pr_warn("%s: Firmware returned bad wait value %d\n", |
---|
599 | | - __func__, mwait); |
---|
600 | | - mwait = EEH_STATE_MIN_WAIT_TIME; |
---|
601 | | - } else if (mwait > EEH_STATE_MAX_WAIT_TIME) { |
---|
602 | | - pr_warn("%s: Firmware returned too long wait value %d\n", |
---|
603 | | - __func__, mwait); |
---|
604 | | - mwait = EEH_STATE_MAX_WAIT_TIME; |
---|
605 | | - } |
---|
606 | | - |
---|
607 | | - max_wait -= mwait; |
---|
608 | | - msleep(mwait); |
---|
609 | | - } |
---|
610 | | - |
---|
611 | | - return EEH_STATE_NOT_SUPPORT; |
---|
| 620 | + return pseries_eeh_phb_reset(pe->phb, pe->addr, option); |
---|
612 | 621 | } |
---|
613 | 622 | |
---|
614 | 623 | /** |
---|
.. | .. |
---|
624 | 633 | */ |
---|
625 | 634 | static int pseries_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len) |
---|
626 | 635 | { |
---|
627 | | - int config_addr; |
---|
628 | 636 | unsigned long flags; |
---|
629 | 637 | int ret; |
---|
630 | 638 | |
---|
631 | 639 | spin_lock_irqsave(&slot_errbuf_lock, flags); |
---|
632 | 640 | memset(slot_errbuf, 0, eeh_error_buf_size); |
---|
633 | 641 | |
---|
634 | | - /* Figure out the PE address */ |
---|
635 | | - config_addr = pe->config_addr; |
---|
636 | | - if (pe->addr) |
---|
637 | | - config_addr = pe->addr; |
---|
638 | | - |
---|
639 | | - ret = rtas_call(ibm_slot_error_detail, 8, 1, NULL, config_addr, |
---|
| 642 | + ret = rtas_call(ibm_slot_error_detail, 8, 1, NULL, pe->addr, |
---|
640 | 643 | BUID_HI(pe->phb->buid), BUID_LO(pe->phb->buid), |
---|
641 | 644 | virt_to_phys(drv_log), len, |
---|
642 | 645 | virt_to_phys(slot_errbuf), eeh_error_buf_size, |
---|
.. | .. |
---|
652 | 655 | * pseries_eeh_configure_bridge - Configure PCI bridges in the indicated PE |
---|
653 | 656 | * @pe: EEH PE |
---|
654 | 657 | * |
---|
655 | | - * The function will be called to reconfigure the bridges included |
---|
656 | | - * in the specified PE so that the mulfunctional PE would be recovered |
---|
657 | | - * again. |
---|
658 | 658 | */ |
---|
659 | 659 | static int pseries_eeh_configure_bridge(struct eeh_pe *pe) |
---|
660 | 660 | { |
---|
661 | | - int config_addr; |
---|
662 | | - int ret; |
---|
663 | | - /* Waiting 0.2s maximum before skipping configuration */ |
---|
664 | | - int max_wait = 200; |
---|
665 | | - |
---|
666 | | - /* Figure out the PE address */ |
---|
667 | | - config_addr = pe->config_addr; |
---|
668 | | - if (pe->addr) |
---|
669 | | - config_addr = pe->addr; |
---|
670 | | - |
---|
671 | | - while (max_wait > 0) { |
---|
672 | | - ret = rtas_call(ibm_configure_pe, 3, 1, NULL, |
---|
673 | | - config_addr, BUID_HI(pe->phb->buid), |
---|
674 | | - BUID_LO(pe->phb->buid)); |
---|
675 | | - |
---|
676 | | - if (!ret) |
---|
677 | | - return ret; |
---|
678 | | - |
---|
679 | | - /* |
---|
680 | | - * If RTAS returns a delay value that's above 100ms, cut it |
---|
681 | | - * down to 100ms in case firmware made a mistake. For more |
---|
682 | | - * on how these delay values work see rtas_busy_delay_time |
---|
683 | | - */ |
---|
684 | | - if (ret > RTAS_EXTENDED_DELAY_MIN+2 && |
---|
685 | | - ret <= RTAS_EXTENDED_DELAY_MAX) |
---|
686 | | - ret = RTAS_EXTENDED_DELAY_MIN+2; |
---|
687 | | - |
---|
688 | | - max_wait -= rtas_busy_delay_time(ret); |
---|
689 | | - |
---|
690 | | - if (max_wait < 0) |
---|
691 | | - break; |
---|
692 | | - |
---|
693 | | - rtas_busy_delay(ret); |
---|
694 | | - } |
---|
695 | | - |
---|
696 | | - pr_warn("%s: Unable to configure bridge PHB#%x-PE#%x (%d)\n", |
---|
697 | | - __func__, pe->phb->global_number, pe->addr, ret); |
---|
698 | | - return ret; |
---|
| 661 | + return pseries_eeh_phb_configure_bridge(pe->phb, pe->addr); |
---|
699 | 662 | } |
---|
700 | 663 | |
---|
701 | 664 | /** |
---|
702 | 665 | * pseries_eeh_read_config - Read PCI config space |
---|
703 | | - * @pdn: PCI device node |
---|
704 | | - * @where: PCI address |
---|
| 666 | + * @edev: EEH device handle |
---|
| 667 | + * @where: PCI config space offset |
---|
705 | 668 | * @size: size to read |
---|
706 | 669 | * @val: return value |
---|
707 | 670 | * |
---|
708 | 671 | * Read config space from the speicifed device |
---|
709 | 672 | */ |
---|
710 | | -static int pseries_eeh_read_config(struct pci_dn *pdn, int where, int size, u32 *val) |
---|
| 673 | +static int pseries_eeh_read_config(struct eeh_dev *edev, int where, int size, u32 *val) |
---|
711 | 674 | { |
---|
| 675 | + struct pci_dn *pdn = eeh_dev_to_pdn(edev); |
---|
| 676 | + |
---|
712 | 677 | return rtas_read_config(pdn, where, size, val); |
---|
713 | 678 | } |
---|
714 | 679 | |
---|
715 | 680 | /** |
---|
716 | 681 | * pseries_eeh_write_config - Write PCI config space |
---|
717 | | - * @pdn: PCI device node |
---|
718 | | - * @where: PCI address |
---|
| 682 | + * @edev: EEH device handle |
---|
| 683 | + * @where: PCI config space offset |
---|
719 | 684 | * @size: size to write |
---|
720 | 685 | * @val: value to be written |
---|
721 | 686 | * |
---|
722 | 687 | * Write config space to the specified device |
---|
723 | 688 | */ |
---|
724 | | -static int pseries_eeh_write_config(struct pci_dn *pdn, int where, int size, u32 val) |
---|
| 689 | +static int pseries_eeh_write_config(struct eeh_dev *edev, int where, int size, u32 val) |
---|
725 | 690 | { |
---|
| 691 | + struct pci_dn *pdn = eeh_dev_to_pdn(edev); |
---|
| 692 | + |
---|
726 | 693 | return rtas_write_config(pdn, where, size, val); |
---|
727 | | -} |
---|
728 | | - |
---|
729 | | -static int pseries_eeh_restore_config(struct pci_dn *pdn) |
---|
730 | | -{ |
---|
731 | | - struct eeh_dev *edev = pdn_to_eeh_dev(pdn); |
---|
732 | | - s64 ret = 0; |
---|
733 | | - |
---|
734 | | - if (!edev) |
---|
735 | | - return -EEXIST; |
---|
736 | | - |
---|
737 | | - /* |
---|
738 | | - * FIXME: The MPS, error routing rules, timeout setting are worthy |
---|
739 | | - * to be exported by firmware in extendible way. |
---|
740 | | - */ |
---|
741 | | - if (edev->physfn) |
---|
742 | | - ret = eeh_restore_vf_config(pdn); |
---|
743 | | - |
---|
744 | | - if (ret) { |
---|
745 | | - pr_warn("%s: Can't reinit PCI dev 0x%x (%lld)\n", |
---|
746 | | - __func__, edev->pe_config_addr, ret); |
---|
747 | | - return -EIO; |
---|
748 | | - } |
---|
749 | | - |
---|
750 | | - return ret; |
---|
751 | 694 | } |
---|
752 | 695 | |
---|
753 | 696 | #ifdef CONFIG_PCI_IOV |
---|
.. | .. |
---|
777 | 720 | |
---|
778 | 721 | static int pseries_call_allow_unfreeze(struct eeh_dev *edev) |
---|
779 | 722 | { |
---|
| 723 | + int cur_vfs = 0, rc = 0, vf_index, bus, devfn, vf_pe_num; |
---|
780 | 724 | struct pci_dn *pdn, *tmp, *parent, *physfn_pdn; |
---|
781 | | - int cur_vfs = 0, rc = 0, vf_index, bus, devfn; |
---|
782 | 725 | u16 *vf_pe_array; |
---|
783 | 726 | |
---|
784 | 727 | vf_pe_array = kzalloc(RTAS_DATA_BUF_SIZE, GFP_KERNEL); |
---|
.. | .. |
---|
811 | 754 | } |
---|
812 | 755 | } else { |
---|
813 | 756 | pdn = pci_get_pdn(edev->pdev); |
---|
814 | | - vf_pe_array[0] = cpu_to_be16(pdn->pe_number); |
---|
815 | 757 | physfn_pdn = pci_get_pdn(edev->physfn); |
---|
| 758 | + |
---|
| 759 | + vf_pe_num = physfn_pdn->pe_num_map[edev->vf_index]; |
---|
| 760 | + vf_pe_array[0] = cpu_to_be16(vf_pe_num); |
---|
816 | 761 | rc = pseries_send_allow_unfreeze(physfn_pdn, |
---|
817 | 762 | vf_pe_array, 1); |
---|
818 | 763 | pdn->last_allow_rc = rc; |
---|
.. | .. |
---|
823 | 768 | return rc; |
---|
824 | 769 | } |
---|
825 | 770 | |
---|
826 | | -static int pseries_notify_resume(struct pci_dn *pdn) |
---|
| 771 | +static int pseries_notify_resume(struct eeh_dev *edev) |
---|
827 | 772 | { |
---|
828 | | - struct eeh_dev *edev = pdn_to_eeh_dev(pdn); |
---|
829 | | - |
---|
830 | 773 | if (!edev) |
---|
831 | 774 | return -EEXIST; |
---|
832 | 775 | |
---|
833 | | - if (rtas_token("ibm,open-sriov-allow-unfreeze") |
---|
834 | | - == RTAS_UNKNOWN_SERVICE) |
---|
| 776 | + if (rtas_token("ibm,open-sriov-allow-unfreeze") == RTAS_UNKNOWN_SERVICE) |
---|
835 | 777 | return -EINVAL; |
---|
836 | 778 | |
---|
837 | 779 | if (edev->pdev->is_physfn || edev->pdev->is_virtfn) |
---|
.. | .. |
---|
843 | 785 | |
---|
844 | 786 | static struct eeh_ops pseries_eeh_ops = { |
---|
845 | 787 | .name = "pseries", |
---|
846 | | - .init = pseries_eeh_init, |
---|
847 | 788 | .probe = pseries_eeh_probe, |
---|
848 | 789 | .set_option = pseries_eeh_set_option, |
---|
849 | | - .get_pe_addr = pseries_eeh_get_pe_addr, |
---|
850 | 790 | .get_state = pseries_eeh_get_state, |
---|
851 | 791 | .reset = pseries_eeh_reset, |
---|
852 | | - .wait_state = pseries_eeh_wait_state, |
---|
853 | 792 | .get_log = pseries_eeh_get_log, |
---|
854 | 793 | .configure_bridge = pseries_eeh_configure_bridge, |
---|
855 | 794 | .err_inject = NULL, |
---|
856 | 795 | .read_config = pseries_eeh_read_config, |
---|
857 | 796 | .write_config = pseries_eeh_write_config, |
---|
858 | 797 | .next_error = NULL, |
---|
859 | | - .restore_config = pseries_eeh_restore_config, |
---|
| 798 | + .restore_config = NULL, /* NB: configure_bridge() does this */ |
---|
860 | 799 | #ifdef CONFIG_PCI_IOV |
---|
861 | 800 | .notify_resume = pseries_notify_resume |
---|
862 | 801 | #endif |
---|
.. | .. |
---|
870 | 809 | */ |
---|
871 | 810 | static int __init eeh_pseries_init(void) |
---|
872 | 811 | { |
---|
873 | | - int ret; |
---|
| 812 | + struct pci_controller *phb; |
---|
| 813 | + struct pci_dn *pdn; |
---|
| 814 | + int ret, config_addr; |
---|
874 | 815 | |
---|
875 | | - ret = eeh_ops_register(&pseries_eeh_ops); |
---|
| 816 | + /* figure out EEH RTAS function call tokens */ |
---|
| 817 | + ibm_set_eeh_option = rtas_token("ibm,set-eeh-option"); |
---|
| 818 | + ibm_set_slot_reset = rtas_token("ibm,set-slot-reset"); |
---|
| 819 | + ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2"); |
---|
| 820 | + ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state"); |
---|
| 821 | + ibm_slot_error_detail = rtas_token("ibm,slot-error-detail"); |
---|
| 822 | + ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2"); |
---|
| 823 | + ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info"); |
---|
| 824 | + ibm_configure_pe = rtas_token("ibm,configure-pe"); |
---|
| 825 | + |
---|
| 826 | + /* |
---|
| 827 | + * ibm,configure-pe and ibm,configure-bridge have the same semantics, |
---|
| 828 | + * however ibm,configure-pe can be faster. If we can't find |
---|
| 829 | + * ibm,configure-pe then fall back to using ibm,configure-bridge. |
---|
| 830 | + */ |
---|
| 831 | + if (ibm_configure_pe == RTAS_UNKNOWN_SERVICE) |
---|
| 832 | + ibm_configure_pe = rtas_token("ibm,configure-bridge"); |
---|
| 833 | + |
---|
| 834 | + /* |
---|
| 835 | + * Necessary sanity check. We needn't check "get-config-addr-info" |
---|
| 836 | + * and its variant since the old firmware probably support address |
---|
| 837 | + * of domain/bus/slot/function for EEH RTAS operations. |
---|
| 838 | + */ |
---|
| 839 | + if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE || |
---|
| 840 | + ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE || |
---|
| 841 | + (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE && |
---|
| 842 | + ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE) || |
---|
| 843 | + ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE || |
---|
| 844 | + ibm_configure_pe == RTAS_UNKNOWN_SERVICE) { |
---|
| 845 | + pr_info("EEH functionality not supported\n"); |
---|
| 846 | + return -EINVAL; |
---|
| 847 | + } |
---|
| 848 | + |
---|
| 849 | + /* Initialize error log size */ |
---|
| 850 | + eeh_error_buf_size = rtas_get_error_log_max(); |
---|
| 851 | + |
---|
| 852 | + /* Set EEH probe mode */ |
---|
| 853 | + eeh_add_flag(EEH_PROBE_MODE_DEVTREE | EEH_ENABLE_IO_FOR_LOG); |
---|
| 854 | + |
---|
| 855 | + /* Set EEH machine dependent code */ |
---|
| 856 | + ppc_md.pcibios_bus_add_device = pseries_pcibios_bus_add_device; |
---|
| 857 | + |
---|
| 858 | + if (is_kdump_kernel() || reset_devices) { |
---|
| 859 | + pr_info("Issue PHB reset ...\n"); |
---|
| 860 | + list_for_each_entry(phb, &hose_list, list_node) { |
---|
| 861 | + // Skip if the slot is empty |
---|
| 862 | + if (list_empty(&PCI_DN(phb->dn)->child_list)) |
---|
| 863 | + continue; |
---|
| 864 | + |
---|
| 865 | + pdn = list_first_entry(&PCI_DN(phb->dn)->child_list, struct pci_dn, list); |
---|
| 866 | + config_addr = pseries_eeh_get_pe_config_addr(pdn); |
---|
| 867 | + |
---|
| 868 | + /* invalid PE config addr */ |
---|
| 869 | + if (config_addr < 0) |
---|
| 870 | + continue; |
---|
| 871 | + |
---|
| 872 | + pseries_eeh_phb_reset(phb, config_addr, EEH_RESET_FUNDAMENTAL); |
---|
| 873 | + pseries_eeh_phb_reset(phb, config_addr, EEH_RESET_DEACTIVATE); |
---|
| 874 | + pseries_eeh_phb_configure_bridge(phb, config_addr); |
---|
| 875 | + } |
---|
| 876 | + } |
---|
| 877 | + |
---|
| 878 | + ret = eeh_init(&pseries_eeh_ops); |
---|
876 | 879 | if (!ret) |
---|
877 | 880 | pr_info("EEH: pSeries platform initialized\n"); |
---|
878 | 881 | else |
---|
879 | 882 | pr_info("EEH: pSeries platform initialization failure (%d)\n", |
---|
880 | 883 | ret); |
---|
881 | | - |
---|
882 | 884 | return ret; |
---|
883 | 885 | } |
---|
884 | | -machine_early_initcall(pseries, eeh_pseries_init); |
---|
| 886 | +machine_arch_initcall(pseries, eeh_pseries_init); |
---|