add support 4g -- >ppp

hc

2023-11-24 2b26ab132d1b33b91c84c6d732456200e8c5ee77

 kernel/arch/arm64/boot/dts/rockchip/rk3568-evb1-ddr4-v10.dtsi
..
..
@@ -15,13 +15,6 @@
15
15
 	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
16
16
 	compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
17
17
 
18
-	rk_headset: rk-headset {
19
-		compatible = "rockchip_headset";
20
-		headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
21
-		pinctrl-names = "default";
22
-		pinctrl-0 = <&hp_det>;
23
-	};
24
-
25
18
 	vcc2v5_sys: vcc2v5-ddr {
26
19
 		compatible = "regulator-fixed";
27
20
 		regulator-name = "vcc2v5-sys";
..
..
@@ -82,7 +75,7 @@
82
75
 		regulator-max-microvolt = <3300000>;
83
76
 		vin-supply = <&vcc5v0_sys>;
84
77
 	};
85
-
78
+#if 0
86
79
 	vcc_camera: vcc-camera-regulator {
87
80
 		compatible = "regulator-fixed";
88
81
 		gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
..
..
@@ -93,6 +86,106 @@
93
86
 		regulator-always-on;
94
87
 		regulator-boot-on;
95
88
 	};
89
+#endif
90
+
91
+	ndj_io_init {
92
+         	compatible = "nk_io_control";	
93
+			pinctrl-names = "default";
94
+        	pinctrl-0 = <&nk_io_gpio>;
95
+			
96
+			//gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
97
+			
98
+			vcc_5v {
99
+				gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
100
+				gpio_function = <0>;	
101
+			};
102
+			
103
+			vcc_12v {
104
+				gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;  //VCC12_IO_EN_GPIO0_C7_3V3
105
+				gpio_function = <0>;
106
+			};
107
+			
108
+			hub_host2_rst {
109
+				gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;  //HUB_RST_GPIO4_D2_3V3
110
+				gpio_function = <3>;
111
+			};
112
+			
113
+			hub_host3 {
114
+				gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
115
+				gpio_function = <0>;
116
+			};
117
+			
118
+			wake_4g {
119
+				gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
120
+				gpio_function = <0>;
121
+			};
122
+			
123
+			air_mode_4g {
124
+				gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
125
+				gpio_function = <0>;
126
+			};
127
+			
128
+			reset_4g {
129
+				gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
130
+				gpio_function = <3>;
131
+			};
132
+			
133
+			en_4g {
134
+				gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
135
+				gpio_function = <0>;
136
+			};
137
+			
138
+			hp_en {
139
+				gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
140
+				gpio_function = <0>;
141
+			};
142
+			
143
+			wifi_power_en {
144
+				gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
145
+				gpio_function = <0>;
146
+			};
147
+	#if 0		
148
+			do1 {
149
+				gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; 
150
+				gpio_function = <0>;
151
+			};
152
+			
153
+			do2 {
154
+				gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
155
+				gpio_function = <0>;
156
+			};
157
+			
158
+			do3 {
159
+				gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
160
+				gpio_function = <0>;
161
+			};
162
+			
163
+			do4 {
164
+				gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
165
+				gpio_function = <0>;
166
+			};
167
+			
168
+			do5 {
169
+				gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; 
170
+				gpio_function = <0>;
171
+			};
172
+			
173
+			do6 {
174
+				gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>; 
175
+				gpio_function = <0>;
176
+			};
177
+			
178
+			do7 {
179
+				gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; 
180
+				gpio_function = <0>;
181
+			};
182
+			
183
+			di1 {
184
+				gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
185
+				gpio_function = <1>;
186
+			};
187
+	#endif
188
+};
96
189
 };
97
190
 
98
191
 &combphy0_us {
..
..
@@ -108,11 +201,11 @@
108
201
 };
109
202
 
110
203
 &csi2_dphy_hw {
111
-	status = "okay";
204
+	status = "disabled";
112
205
 };
113
206
 
114
207
 &csi2_dphy0 {
115
-	status = "okay";
208
+	status = "disabled";
116
209
 
117
210
 	ports {
118
211
 		#address-cells = <1>;
..
..
@@ -156,7 +249,7 @@
156
249
  * when dsi0 is enabled
157
250
  */
158
251
 &dsi0 {
159
-	status = "okay";
252
+	status = "disabled";
160
253
 };
161
254
 
162
255
 &dsi0_in_vp0 {
..
..
@@ -164,7 +257,7 @@
164
257
 };
165
258
 
166
259
 &dsi0_in_vp1 {
167
-	status = "okay";
260
+	status = "disabled";
168
261
 };
169
262
 
170
263
 &dsi0_panel {
..
..
@@ -232,14 +325,14 @@
232
325
 	rx_delay = <0x2f>;
233
326
 
234
327
 	phy-handle = <&rgmii_phy0>;
235
-	status = "okay";
328
+	status = "disabled";
236
329
 };
237
330
 
238
331
 &gmac1 {
239
332
 	phy-mode = "rgmii";
240
333
 	clock_in_out = "output";
241
334
 
242
-	snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
335
+	snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
243
336
 	snps,reset-active-low;
244
337
 	/* Reset time is 20ms, 100ms for rtl8211f */
245
338
 	snps,reset-delays-us = <0 20000 100000>;
..
..
@@ -266,12 +359,9 @@
266
359
  * power-supply should switche to vcc3v3_lcd1_n
267
360
  * when mipi panel is connected to dsi1.
268
361
  */
269
-&gt1x {
270
-	power-supply = <&vcc3v3_lcd0_n>;
271
-};
272
362
 
273
363
 &i2c4 {
274
-	status = "okay";
364
+	status = "disabled";
275
365
 	gc8034: gc8034@37 {
276
366
 		compatible = "galaxycore,gc8034";
277
367
 		status = "okay";
..
..
@@ -317,7 +407,7 @@
317
407
 		};
318
408
 	};
319
409
 	ov5695: ov5695@36 {
320
-		status = "okay";
410
+		status = "disabled";
321
411
 		compatible = "ovti,ov5695";
322
412
 		reg = <0x36>;
323
413
 		clocks = <&cru CLK_CIF_OUT>;
..
..
@@ -355,7 +445,7 @@
355
445
 };
356
446
 
357
447
 &video_phy0 {
358
-	status = "okay";
448
+	status = "disabled";
359
449
 };
360
450
 
361
451
 &video_phy1 {
..
..
@@ -397,14 +487,44 @@
397
487
 			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
398
488
 		};
399
489
 	};
490
+	
491
+	nk_io_init{
492
+		nk_io_gpio: nk-io-gpio{
493
+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
494
+							<0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
495
+							<0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
496
+							<4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
497
+							<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
498
+							<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
499
+							<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
500
+							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, 
501
+							<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
502
+							<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
503
+							<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
504
+							<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
505
+							<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
506
+							<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
507
+							<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
508
+							<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
509
+							<2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
510
+							<2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
511
+							<2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
512
+							<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
513
+							<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
514
+		};
515
+	};
516
+};
517
+
518
+&rk809_sound {
519
+	hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
400
520
 };
401
521
 
402
522
 &rkisp {
403
-	status = "okay";
523
+	status = "disabled";
404
524
 };
405
525
 
406
526
 &rkisp_mmu {
407
-	status = "okay";
527
+	status = "disabled";
408
528
 };
409
529
 
410
530
 &rkisp_vir0 {
..
..
@@ -422,7 +542,7 @@
422
542
 };
423
543
 
424
544
 &route_dsi0 {
425
-	status = "okay";
545
+	status = "disabled";
426
546
 	connect = <&vp1_out_dsi0>;
427
547
 };
428
548