hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614
kernel/sound/soc/qcom/qdsp6/q6afe.h
....@@ -5,7 +5,7 @@
55
66 #include <dt-bindings/sound/qcom,q6afe.h>
77
8
-#define AFE_PORT_MAX 105
8
+#define AFE_PORT_MAX 127
99
1010 #define MSM_AFE_PORT_TYPE_RX 0
1111 #define MSM_AFE_PORT_TYPE_TX 1
....@@ -133,6 +133,19 @@
133133 /* Clock ID for INT MCLK1 */
134134 #define Q6AFE_LPASS_CLK_ID_INT_MCLK_1 0x306
135135
136
+#define Q6AFE_LPASS_CLK_ID_WSA_CORE_MCLK 0x309
137
+#define Q6AFE_LPASS_CLK_ID_WSA_CORE_NPL_MCLK 0x30a
138
+#define Q6AFE_LPASS_CLK_ID_TX_CORE_MCLK 0x30c
139
+#define Q6AFE_LPASS_CLK_ID_TX_CORE_NPL_MCLK 0x30d
140
+#define Q6AFE_LPASS_CLK_ID_RX_CORE_MCLK 0x30e
141
+#define Q6AFE_LPASS_CLK_ID_RX_CORE_NPL_MCLK 0x30f
142
+#define Q6AFE_LPASS_CLK_ID_VA_CORE_MCLK 0x30b
143
+#define Q6AFE_LPASS_CLK_ID_VA_CORE_2X_MCLK 0x310
144
+
145
+#define Q6AFE_LPASS_CORE_AVTIMER_BLOCK 0x2
146
+#define Q6AFE_LPASS_CORE_HW_MACRO_BLOCK 0x3
147
+#define Q6AFE_LPASS_CORE_HW_DCODEC_BLOCK 0x4
148
+
136149 /* Clock attribute for invalid use (reserved for internal usage) */
137150 #define Q6AFE_LPASS_CLK_ATTRIBUTE_INVALID 0x0
138151 /* Clock attribute for no couple case */
....@@ -184,11 +197,21 @@
184197 u16 ch_mapping[AFE_MAX_CHAN_COUNT];
185198 };
186199
200
+struct q6afe_cdc_dma_cfg {
201
+ u16 sample_rate;
202
+ u16 bit_width;
203
+ u16 data_format;
204
+ u16 num_channels;
205
+ u16 active_channels_mask;
206
+};
207
+
208
+
187209 struct q6afe_port_config {
188210 struct q6afe_hdmi_cfg hdmi;
189211 struct q6afe_slim_cfg slim;
190212 struct q6afe_i2s_cfg i2s_cfg;
191213 struct q6afe_tdm_cfg tdm;
214
+ struct q6afe_cdc_dma_cfg dma_cfg;
192215 };
193216
194217 struct q6afe_port;
....@@ -204,8 +227,16 @@
204227 struct q6afe_slim_cfg *cfg);
205228 int q6afe_i2s_port_prepare(struct q6afe_port *port, struct q6afe_i2s_cfg *cfg);
206229 void q6afe_tdm_port_prepare(struct q6afe_port *port, struct q6afe_tdm_cfg *cfg);
230
+void q6afe_cdc_dma_port_prepare(struct q6afe_port *port,
231
+ struct q6afe_cdc_dma_cfg *cfg);
207232
208233 int q6afe_port_set_sysclk(struct q6afe_port *port, int clk_id,
209234 int clk_src, int clk_root,
210235 unsigned int freq, int dir);
236
+int q6afe_set_lpass_clock(struct device *dev, int clk_id, int clk_src,
237
+ int clk_root, unsigned int freq);
238
+int q6afe_vote_lpass_core_hw(struct device *dev, uint32_t hw_block_id,
239
+ char *client_name, uint32_t *client_handle);
240
+int q6afe_unvote_lpass_core_hw(struct device *dev, uint32_t hw_block_id,
241
+ uint32_t client_handle);
211242 #endif /* __Q6AFE_H__ */