add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/drivers/rkflash/sfc_nand.c
..
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@@ -52,6 +52,8 @@
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 	{ 0xC2, 0x96, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
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53
 	/* MX35UF2GE4AD */
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 	{ 0xC2, 0xA6, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
55
+	/* MX35UF4GE4AD */
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+	{ 0xC2, 0xB7, 0x00, 8, 0x40, 1, 2048, 0x0C, 20, 0x8, 1, { 0x04, 0x08, 0x14, 0x18 }, &sfc_nand_get_ecc_status0 },
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57
 
56
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 	/* GD5F1GQ4UAYIG */
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 	{ 0xC8, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
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@@ -129,7 +131,7 @@
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 	/* F35SQA512M */
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 	{ 0xCD, 0x70, 0x00, 4, 0x40, 1, 512, 0x4C, 17, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
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 	/* F35UQA512M */
132
-	{ 0xCD, 0x70, 0x00, 4, 0x40, 1, 512, 0x4C, 17, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
134
+	{ 0xCD, 0x60, 0x00, 4, 0x40, 1, 512, 0x4C, 17, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
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135
 
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 	/* DS35Q1GA-IB */
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 	{ 0xE5, 0x71, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
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@@ -204,6 +206,8 @@
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 	{ 0xEA, 0xC1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
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 	/* TX25G01 */
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 	{ 0xA1, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status8 },
209
+	/* S35ML02G3 */
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+	{ 0x01, 0x25, 0x00, 4, 0x40, 2, 1024, 0x4C, 19, 0x4, 1, { 0x04, 0x08, 0x0C, 0x10 }, &sfc_nand_get_ecc_status9 },
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 	/* S35ML04G3 */
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 	{ 0x01, 0x35, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 1, { 0x04, 0x08, 0x0C, 0x10 }, &sfc_nand_get_ecc_status9 },
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 };
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@@ -859,7 +863,7 @@
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 	if (p_nand_info->id0 == MID_GIGADEV) {
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 		sfc_nand_read_cache(addr, (u32 *)sfc_nand_dev.recheck_buffer, 0, data_area_size);
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 		if (memcmp(sfc_nand_dev.recheck_buffer, p_page_buf, data_area_size)) {
862
-			rkflash_print_error("%s %x cache bitflip\n", __func__, addr);
866
+			rkflash_print_error("%s cache bitflip1\n", __func__);
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 			msleep(1000);
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 			sfc_request(&op, plane, p_page_buf, page_size);
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 		}
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@@ -962,7 +966,9 @@
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 	u32 sec_per_page = p_nand_info->sec_per_page;
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 	u32 data_size = sec_per_page * SFC_NAND_SECTOR_SIZE;
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 	struct nand_mega_area *meta = &p_nand_info->meta;
969
+	int retries = 0;
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971
+retry:
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 	ret = sfc_nand_read_page_raw(cs, addr, gp_page_buf);
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 	memcpy(p_data, gp_page_buf, data_size);
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 	p_spare[0] = gp_page_buf[(data_size + meta->off0) / 4];
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@@ -984,6 +990,10 @@
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 		if (p_spare)
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 			rkflash_print_hex("spare:", p_spare, 4, 2);
993
+		if (ret == SFC_NAND_ECC_ERROR && retries < 1) {
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+			retries++;
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+			goto retry;
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+		}
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 	}
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 	return ret;