add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c
..
..
@@ -1,10 +1,8 @@
1
-/*
2
- * aQuantia Corporation Network Driver
3
- * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
1
+// SPDX-License-Identifier: GPL-2.0-only
2
+/* Atlantic Network Driver
4
3
  *
5
- * This program is free software; you can redistribute it and/or modify it
6
- * under the terms and conditions of the GNU General Public License,
7
- * version 2, as published by the Free Software Foundation.
4
+ * Copyright (C) 2014-2019 aQuantia Corporation
5
+ * Copyright (C) 2019-2020 Marvell International Ltd.
8
6
  */
9
7
 
10
8
 /* File aq_pci_func.c: Definition of PCI functions. */
..
..
@@ -19,6 +17,10 @@
19
17
 #include "aq_pci_func.h"
20
18
 #include "hw_atl/hw_atl_a0.h"
21
19
 #include "hw_atl/hw_atl_b0.h"
20
+#include "hw_atl2/hw_atl2.h"
21
+#include "aq_filters.h"
22
+#include "aq_drvinfo.h"
23
+#include "aq_macsec.h"
22
24
 
23
25
 static const struct pci_device_id aq_pci_tbl[] = {
24
26
 	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_0001), },
..
..
@@ -41,8 +43,14 @@
41
43
 	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC111S), },
42
44
 	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC112S), },
43
45
 
44
-	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC111E), },
45
-	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC112E), },
46
+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113DEV), },
47
+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113CS), },
48
+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC114CS), },
49
+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113), },
50
+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113C), },
51
+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC115C), },
52
+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113CA), },
53
+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC116C), },
46
54
 
47
55
 	{}
48
56
 };
..
..
@@ -74,8 +82,15 @@
74
82
 	{ AQ_DEVICE_ID_AQC111S,	AQ_HWREV_ANY,	&hw_atl_ops_b1, &hw_atl_b0_caps_aqc111s, },
75
83
 	{ AQ_DEVICE_ID_AQC112S,	AQ_HWREV_ANY,	&hw_atl_ops_b1, &hw_atl_b0_caps_aqc112s, },
76
84
 
77
-	{ AQ_DEVICE_ID_AQC111E,	AQ_HWREV_ANY,	&hw_atl_ops_b1, &hw_atl_b0_caps_aqc111e, },
78
-	{ AQ_DEVICE_ID_AQC112E,	AQ_HWREV_ANY,	&hw_atl_ops_b1, &hw_atl_b0_caps_aqc112e, },
85
+	{ AQ_DEVICE_ID_AQC113DEV,	AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc113, },
86
+	{ AQ_DEVICE_ID_AQC113,		AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc113, },
87
+	{ AQ_DEVICE_ID_AQC113CS,	AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc113, },
88
+	{ AQ_DEVICE_ID_AQC114CS,	AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc113, },
89
+	{ AQ_DEVICE_ID_AQC113C,		AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc113, },
90
+	{ AQ_DEVICE_ID_AQC115C,		AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc115c, },
91
+	{ AQ_DEVICE_ID_AQC113CA,	AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc113, },
92
+	{ AQ_DEVICE_ID_AQC116C,		AQ_HWREV_ANY,	&hw_atl2_ops, &hw_atl2_caps_aqc116c, },
93
+
79
94
 };
80
95
 
81
96
 MODULE_DEVICE_TABLE(pci, aq_pci_tbl);
..
..
@@ -84,7 +99,7 @@
84
99
 				     const struct aq_hw_ops **ops,
85
100
 				     const struct aq_hw_caps_s **caps)
86
101
 {
87
-	int i = 0;
102
+	int i;
88
103
 
89
104
 	if (pdev->vendor != PCI_VENDOR_ID_AQUANTIA)
90
105
 		return -EINVAL;
..
..
@@ -105,15 +120,13 @@
105
120
 	return 0;
106
121
 }
107
122
 
108
-int aq_pci_func_init(struct pci_dev *pdev)
123
+static int aq_pci_func_init(struct pci_dev *pdev)
109
124
 {
110
-	int err = 0;
125
+	int err;
111
126
 
112
127
 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
113
-	if (!err) {
128
+	if (!err)
114
129
 		err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
115
-
116
-	}
117
130
 	if (err) {
118
131
 		err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
119
132
 		if (!err)
..
..
@@ -138,41 +151,50 @@
138
151
 }
139
152
 
140
153
 int aq_pci_func_alloc_irq(struct aq_nic_s *self, unsigned int i,
141
-			  char *name, void *aq_vec, cpumask_t *affinity_mask)
154
+			  char *name, irq_handler_t irq_handler,
155
+			  void *irq_arg, cpumask_t *affinity_mask)
142
156
 {
143
157
 	struct pci_dev *pdev = self->pdev;
144
-	int err = 0;
158
+	int err;
145
159
 
146
160
 	if (pdev->msix_enabled || pdev->msi_enabled)
147
-		err = request_irq(pci_irq_vector(pdev, i), aq_vec_isr, 0,
148
-				  name, aq_vec);
161
+		err = request_irq(pci_irq_vector(pdev, i), irq_handler, 0,
162
+				  name, irq_arg);
149
163
 	else
150
164
 		err = request_irq(pci_irq_vector(pdev, i), aq_vec_isr_legacy,
151
-				  IRQF_SHARED, name, aq_vec);
165
+				  IRQF_SHARED, name, irq_arg);
152
166
 
153
167
 	if (err >= 0) {
154
168
 		self->msix_entry_mask |= (1 << i);
155
-		self->aq_vec[i] = aq_vec;
156
169
 
157
-		if (pdev->msix_enabled)
170
+		if (pdev->msix_enabled && affinity_mask)
158
171
 			irq_set_affinity_hint(pci_irq_vector(pdev, i),
159
172
 					      affinity_mask);
160
173
 	}
174
+
161
175
 	return err;
162
176
 }
163
177
 
164
178
 void aq_pci_func_free_irqs(struct aq_nic_s *self)
165
179
 {
166
180
 	struct pci_dev *pdev = self->pdev;
167
-	unsigned int i = 0U;
181
+	unsigned int i;
182
+	void *irq_data;
168
183
 
169
184
 	for (i = 32U; i--;) {
170
185
 		if (!((1U << i) & self->msix_entry_mask))
171
186
 			continue;
187
+		if (self->aq_nic_cfg.link_irq_vec &&
188
+		    i == self->aq_nic_cfg.link_irq_vec)
189
+			irq_data = self;
190
+		else if (i < AQ_CFG_VECS_MAX)
191
+			irq_data = self->aq_vec[i];
192
+		else
193
+			continue;
172
194
 
173
195
 		if (pdev->msix_enabled)
174
196
 			irq_set_affinity_hint(pci_irq_vector(pdev, i), NULL);
175
-		free_irq(pci_irq_vector(pdev, i), self->aq_vec[i]);
197
+		free_irq(pci_irq_vector(pdev, i), irq_data);
176
198
 		self->msix_entry_mask &= ~(1U << i);
177
199
 	}
178
200
 }
..
..
@@ -182,7 +204,8 @@
182
204
 	if (self->pdev->msix_enabled)
183
205
 		return AQ_HW_IRQ_MSIX;
184
206
 	if (self->pdev->msi_enabled)
185
-		return AQ_HW_IRQ_MSIX;
207
+		return AQ_HW_IRQ_MSI;
208
+
186
209
 	return AQ_HW_IRQ_LEGACY;
187
210
 }
188
211
 
..
..
@@ -194,12 +217,12 @@
194
217
 static int aq_pci_probe(struct pci_dev *pdev,
195
218
 			const struct pci_device_id *pci_id)
196
219
 {
197
-	struct aq_nic_s *self = NULL;
198
-	int err = 0;
199
220
 	struct net_device *ndev;
200
221
 	resource_size_t mmio_pa;
201
-	u32 bar;
222
+	struct aq_nic_s *self;
202
223
 	u32 numvecs;
224
+	u32 bar;
225
+	int err;
203
226
 
204
227
 	err = pci_enable_device(pdev);
205
228
 	if (err)
..
..
@@ -220,6 +243,8 @@
220
243
 	SET_NETDEV_DEV(ndev, &pdev->dev);
221
244
 	pci_set_drvdata(pdev, self);
222
245
 
246
+	mutex_init(&self->fwreq_mutex);
247
+
223
248
 	err = aq_pci_probe_get_hw_by_id(pdev, &self->aq_hw_ops,
224
249
 					&aq_nic_get_cfg(self)->aq_hw_caps);
225
250
 	if (err)
..
..
@@ -231,6 +256,15 @@
231
256
 		goto err_ioremap;
232
257
 	}
233
258
 	self->aq_hw->aq_nic_cfg = aq_nic_get_cfg(self);
259
+	if (self->aq_hw->aq_nic_cfg->aq_hw_caps->priv_data_len) {
260
+		int len = self->aq_hw->aq_nic_cfg->aq_hw_caps->priv_data_len;
261
+
262
+		self->aq_hw->priv = kzalloc(len, GFP_KERNEL);
263
+		if (!self->aq_hw->priv) {
264
+			err = -ENOMEM;
265
+			goto err_free_aq_hw;
266
+		}
267
+	}
234
268
 
235
269
 	for (bar = 0; bar < 4; ++bar) {
236
270
 		if (IORESOURCE_MEM & pci_resource_flags(pdev, bar)) {
..
..
@@ -239,19 +273,19 @@
239
273
 			mmio_pa = pci_resource_start(pdev, bar);
240
274
 			if (mmio_pa == 0U) {
241
275
 				err = -EIO;
242
-				goto err_free_aq_hw;
276
+				goto err_free_aq_hw_priv;
243
277
 			}
244
278
 
245
279
 			reg_sz = pci_resource_len(pdev, bar);
246
280
 			if ((reg_sz <= 24 /*ATL_REGS_SIZE*/)) {
247
281
 				err = -EIO;
248
-				goto err_free_aq_hw;
282
+				goto err_free_aq_hw_priv;
249
283
 			}
250
284
 
251
-			self->aq_hw->mmio = ioremap_nocache(mmio_pa, reg_sz);
285
+			self->aq_hw->mmio = ioremap(mmio_pa, reg_sz);
252
286
 			if (!self->aq_hw->mmio) {
253
287
 				err = -EIO;
254
-				goto err_free_aq_hw;
288
+				goto err_free_aq_hw_priv;
255
289
 			}
256
290
 			break;
257
291
 		}
..
..
@@ -259,12 +293,16 @@
259
293
 
260
294
 	if (bar == 4) {
261
295
 		err = -EIO;
262
-		goto err_free_aq_hw;
296
+		goto err_free_aq_hw_priv;
263
297
 	}
264
298
 
265
299
 	numvecs = min((u8)AQ_CFG_VECS_DEF,
266
300
 		      aq_nic_get_cfg(self)->aq_hw_caps->msix_irqs);
267
301
 	numvecs = min(numvecs, num_online_cpus());
302
+	/* Request IRQ vector for PTP */
303
+	numvecs += 1;
304
+
305
+	numvecs += AQ_HW_SERVICE_IRQS;
268
306
 	/*enable interrupts */
269
307
 #if !AQ_CFG_FORCE_LEGACY_INT
270
308
 	err = pci_alloc_irq_vectors(self->pdev, 1, numvecs,
..
..
@@ -286,6 +324,8 @@
286
324
 	if (err < 0)
287
325
 		goto err_register;
288
326
 
327
+	aq_drvinfo_init(ndev);
328
+
289
329
 	return 0;
290
330
 
291
331
 err_register:
..
..
@@ -293,6 +333,8 @@
293
333
 	aq_pci_free_irq_vectors(self);
294
334
 err_hwinit:
295
335
 	iounmap(self->aq_hw->mmio);
336
+err_free_aq_hw_priv:
337
+	kfree(self->aq_hw->priv);
296
338
 err_free_aq_hw:
297
339
 	kfree(self->aq_hw);
298
340
 err_ioremap:
..
..
@@ -301,6 +343,7 @@
301
343
 	pci_release_regions(pdev);
302
344
 err_pci_func:
303
345
 	pci_disable_device(pdev);
346
+
304
347
 	return err;
305
348
 }
306
349
 
..
..
@@ -309,11 +352,17 @@
309
352
 	struct aq_nic_s *self = pci_get_drvdata(pdev);
310
353
 
311
354
 	if (self->ndev) {
355
+		aq_clear_rxnfc_all_rules(self);
312
356
 		if (self->ndev->reg_state == NETREG_REGISTERED)
313
357
 			unregister_netdev(self->ndev);
358
+
359
+#if IS_ENABLED(CONFIG_MACSEC)
360
+		aq_macsec_free(self);
361
+#endif
314
362
 		aq_nic_free_vectors(self);
315
363
 		aq_pci_free_irq_vectors(self);
316
364
 		iounmap(self->aq_hw->mmio);
365
+		kfree(self->aq_hw->priv);
317
366
 		kfree(self->aq_hw);
318
367
 		pci_release_regions(pdev);
319
368
 		free_netdev(self->ndev);
..
..
@@ -336,29 +385,109 @@
336
385
 	}
337
386
 }
338
387
 
339
-static int aq_pci_suspend(struct pci_dev *pdev, pm_message_t pm_msg)
388
+static int aq_suspend_common(struct device *dev)
340
389
 {
341
-	struct aq_nic_s *self = pci_get_drvdata(pdev);
390
+	struct aq_nic_s *nic = pci_get_drvdata(to_pci_dev(dev));
342
391
 
343
-	return aq_nic_change_pm_state(self, &pm_msg);
392
+	rtnl_lock();
393
+
394
+	nic->power_state = AQ_HW_POWER_STATE_D3;
395
+	netif_device_detach(nic->ndev);
396
+	netif_tx_stop_all_queues(nic->ndev);
397
+
398
+	if (netif_running(nic->ndev))
399
+		aq_nic_stop(nic);
400
+
401
+	aq_nic_deinit(nic, !nic->aq_hw->aq_nic_cfg->wol);
402
+	aq_nic_set_power(nic);
403
+
404
+	rtnl_unlock();
405
+
406
+	return 0;
344
407
 }
345
408
 
346
-static int aq_pci_resume(struct pci_dev *pdev)
409
+static int atl_resume_common(struct device *dev)
347
410
 {
348
-	struct aq_nic_s *self = pci_get_drvdata(pdev);
349
-	pm_message_t pm_msg = PMSG_RESTORE;
411
+	struct pci_dev *pdev = to_pci_dev(dev);
412
+	struct aq_nic_s *nic;
413
+	int ret = 0;
350
414
 
351
-	return aq_nic_change_pm_state(self, &pm_msg);
415
+	nic = pci_get_drvdata(pdev);
416
+
417
+	rtnl_lock();
418
+
419
+	pci_set_power_state(pdev, PCI_D0);
420
+	pci_restore_state(pdev);
421
+
422
+	if (netif_running(nic->ndev)) {
423
+		ret = aq_nic_init(nic);
424
+		if (ret)
425
+			goto err_exit;
426
+
427
+		ret = aq_nic_start(nic);
428
+		if (ret)
429
+			goto err_exit;
430
+	}
431
+
432
+	netif_device_attach(nic->ndev);
433
+	netif_tx_start_all_queues(nic->ndev);
434
+
435
+err_exit:
436
+	if (ret < 0)
437
+		aq_nic_deinit(nic, true);
438
+
439
+	rtnl_unlock();
440
+
441
+	return ret;
352
442
 }
443
+
444
+static int aq_pm_freeze(struct device *dev)
445
+{
446
+	return aq_suspend_common(dev);
447
+}
448
+
449
+static int aq_pm_suspend_poweroff(struct device *dev)
450
+{
451
+	return aq_suspend_common(dev);
452
+}
453
+
454
+static int aq_pm_thaw(struct device *dev)
455
+{
456
+	return atl_resume_common(dev);
457
+}
458
+
459
+static int aq_pm_resume_restore(struct device *dev)
460
+{
461
+	return atl_resume_common(dev);
462
+}
463
+
464
+static const struct dev_pm_ops aq_pm_ops = {
465
+	.suspend = aq_pm_suspend_poweroff,
466
+	.poweroff = aq_pm_suspend_poweroff,
467
+	.freeze = aq_pm_freeze,
468
+	.resume = aq_pm_resume_restore,
469
+	.restore = aq_pm_resume_restore,
470
+	.thaw = aq_pm_thaw,
471
+};
353
472
 
354
473
 static struct pci_driver aq_pci_ops = {
355
474
 	.name = AQ_CFG_DRV_NAME,
356
475
 	.id_table = aq_pci_tbl,
357
476
 	.probe = aq_pci_probe,
358
477
 	.remove = aq_pci_remove,
359
-	.suspend = aq_pci_suspend,
360
-	.resume = aq_pci_resume,
361
478
 	.shutdown = aq_pci_shutdown,
479
+#ifdef CONFIG_PM
480
+	.driver.pm = &aq_pm_ops,
481
+#endif
362
482
 };
363
483
 
364
-module_pci_driver(aq_pci_ops);
484
+int aq_pci_func_register_driver(void)
485
+{
486
+	return pci_register_driver(&aq_pci_ops);
487
+}
488
+
489
+void aq_pci_func_unregister_driver(void)
490
+{
491
+	pci_unregister_driver(&aq_pci_ops);
492
+}
493
+