add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/drivers/gpu/drm/via/via_verifier.c
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@@ -28,13 +28,13 @@
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  * be very slow.
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  */
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-#include "via_3d_reg.h"
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-#include <drm/drmP.h>
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-#include <drm/via_drm.h>
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+#include <drm/drm_device.h>
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 #include <drm/drm_legacy.h>
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-#include "via_verifier.h"
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+#include <drm/via_drm.h>
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+
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+#include "via_3d_reg.h"
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 #include "via_drv.h"
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-#include <linux/kernel.h>
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+#include "via_verifier.h"
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 typedef enum {
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 	state_command,
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@@ -725,14 +725,14 @@
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 	next_fire = dev_priv->fire_offsets[*fire_count];
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 	buf++;
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 	cmd = (*buf & 0xFFFF0000) >> 16;
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-	VIA_WRITE(HC_REG_TRANS_SET + HC_REG_BASE, *buf++);
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+	via_write(dev_priv, HC_REG_TRANS_SET + HC_REG_BASE, *buf++);
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 	switch (cmd) {
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 	case HC_ParaType_CmdVdata:
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 		while ((buf < buf_end) &&
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 		       (*fire_count < dev_priv->num_fire_offsets) &&
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 		       (*buf & HC_ACMD_MASK) == HC_ACMD_HCmdB) {
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 			while (buf <= next_fire) {
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-				VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE +
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+				via_write(dev_priv, HC_REG_TRANS_SPACE + HC_REG_BASE +
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 					  (burst & 63), *buf++);
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 				burst += 4;
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 			}
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@@ -753,7 +753,7 @@
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 			    (*buf & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6)
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 				break;
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-			VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE +
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+			via_write(dev_priv, HC_REG_TRANS_SPACE + HC_REG_BASE +
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 				  (burst & 63), *buf++);
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 			burst += 4;
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 		}
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@@ -843,7 +843,7 @@
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 		cmd = *buf;
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 		if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1)
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 			break;
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-		VIA_WRITE((cmd & ~HALCYON_HEADER1MASK) << 2, *++buf);
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+		via_write(dev_priv, (cmd & ~HALCYON_HEADER1MASK) << 2, *++buf);
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 		buf++;
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 	}
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 	*buffer = buf;
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@@ -894,7 +894,7 @@
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 	i = count = *buf;
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 	buf += 3;
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 	while (i--)
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-		VIA_WRITE(addr, *buf++);
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+		via_write(dev_priv, addr, *buf++);
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 	if (count & 3)
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 		buf += 4 - (count & 3);
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 	*buffer = buf;
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@@ -950,7 +950,7 @@
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 	buf += 3;
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 	while (i--) {
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 		addr = *buf++;
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-		VIA_WRITE(addr, *buf++);
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+		via_write(dev_priv, addr, *buf++);
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 	}
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 	count <<= 1;
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 	if (count & 3)