hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614
kernel/drivers/gpu/drm/msm/dsi/dsi_cfg.c
....@@ -1,14 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 and
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- * only version 2 as published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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- * GNU General Public License for more details.
124 */
135
146 #include "dsi_cfg.h"
....@@ -74,6 +66,26 @@
7466 .num_dsi = 1,
7567 };
7668
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+static const char * const dsi_8976_bus_clk_names[] = {
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+ "mdp_core", "iface", "bus",
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+};
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+
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+static const struct msm_dsi_config msm8976_dsi_cfg = {
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+ .io_offset = DSI_6G_REG_SHIFT,
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+ .reg_cfg = {
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+ .num = 3,
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+ .regs = {
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+ {"gdsc", -1, -1},
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+ {"vdda", 100000, 100}, /* 1.2 V */
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+ {"vddio", 100000, 100}, /* 1.8 V */
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+ },
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+ },
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+ .bus_clk_names = dsi_8976_bus_clk_names,
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+ .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names),
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+ .io_start = { 0x1a94000, 0x1a96000 },
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+ .num_dsi = 2,
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+};
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+
7789 static const struct msm_dsi_config msm8994_dsi_cfg = {
7890 .io_offset = DSI_6G_REG_SHIFT,
7991 .reg_cfg = {
....@@ -105,7 +117,7 @@
105117 static const struct msm_dsi_config msm8996_dsi_cfg = {
106118 .io_offset = DSI_6G_REG_SHIFT,
107119 .reg_cfg = {
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- .num = 2,
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+ .num = 3,
109121 .regs = {
110122 {"vdda", 18160, 1 }, /* 1.25 V */
111123 {"vcca", 17000, 32 }, /* 0.925 V */
....@@ -118,7 +130,48 @@
118130 .num_dsi = 2,
119131 };
120132
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+static const char * const dsi_msm8998_bus_clk_names[] = {
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+ "iface", "bus", "core",
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+};
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+
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+static const struct msm_dsi_config msm8998_dsi_cfg = {
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+ .io_offset = DSI_6G_REG_SHIFT,
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+ .reg_cfg = {
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+ .num = 2,
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+ .regs = {
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+ {"vdd", 367000, 16 }, /* 0.9 V */
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+ {"vdda", 62800, 2 }, /* 1.2 V */
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+ },
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+ },
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+ .bus_clk_names = dsi_msm8998_bus_clk_names,
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+ .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names),
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+ .io_start = { 0xc994000, 0xc996000 },
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+ .num_dsi = 2,
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+};
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+
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+static const char * const dsi_sdm660_bus_clk_names[] = {
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+ "iface", "bus", "core", "core_mmss",
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+};
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+
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+static const struct msm_dsi_config sdm660_dsi_cfg = {
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+ .io_offset = DSI_6G_REG_SHIFT,
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+ .reg_cfg = {
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+ .num = 1,
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+ .regs = {
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+ {"vdda", 12560, 4 }, /* 1.2 V */
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+ },
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+ },
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+ .bus_clk_names = dsi_sdm660_bus_clk_names,
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+ .num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names),
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+ .io_start = { 0xc994000, 0xc996000 },
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+ .num_dsi = 2,
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+};
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+
121170 static const char * const dsi_sdm845_bus_clk_names[] = {
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+ "iface", "bus",
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+};
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+
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+static const char * const dsi_sc7180_bus_clk_names[] = {
122175 "iface", "bus",
123176 };
124177
....@@ -136,7 +189,22 @@
136189 .num_dsi = 2,
137190 };
138191
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-const static struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
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+static const struct msm_dsi_config sc7180_dsi_cfg = {
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+ .io_offset = DSI_6G_REG_SHIFT,
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+ .reg_cfg = {
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+ .num = 1,
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+ .regs = {
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+ {"vdda", 21800, 4 }, /* 1.2 V */
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+ },
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+ },
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+ .bus_clk_names = dsi_sc7180_bus_clk_names,
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+ .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names),
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+ .io_start = { 0xae94000 },
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+ .num_dsi = 1,
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+};
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+
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+static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
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+ .link_clk_set_rate = dsi_link_clk_set_rate_v2,
140208 .link_clk_enable = dsi_link_clk_enable_v2,
141209 .link_clk_disable = dsi_link_clk_disable_v2,
142210 .clk_init_ver = dsi_clk_init_v2,
....@@ -147,7 +215,8 @@
147215 .calc_clk_rate = dsi_calc_clk_rate_v2,
148216 };
149217
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-const static struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = {
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+static const struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = {
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+ .link_clk_set_rate = dsi_link_clk_set_rate_6g,
151220 .link_clk_enable = dsi_link_clk_enable_6g,
152221 .link_clk_disable = dsi_link_clk_disable_6g,
153222 .clk_init_ver = NULL,
....@@ -158,7 +227,8 @@
158227 .calc_clk_rate = dsi_calc_clk_rate_6g,
159228 };
160229
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-const static struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = {
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+static const struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = {
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+ .link_clk_set_rate = dsi_link_clk_set_rate_6g,
162232 .link_clk_enable = dsi_link_clk_enable_6g,
163233 .link_clk_disable = dsi_link_clk_disable_6g,
164234 .clk_init_ver = dsi_clk_init_6g_v2,
....@@ -186,8 +256,20 @@
186256 &msm8916_dsi_cfg, &msm_dsi_6g_host_ops},
187257 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1,
188258 &msm8996_dsi_cfg, &msm_dsi_6g_host_ops},
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+ {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_2,
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+ &msm8976_dsi_cfg, &msm_dsi_6g_host_ops},
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+ {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_1_0,
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+ &sdm660_dsi_cfg, &msm_dsi_6g_v2_host_ops},
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+ {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_0,
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+ &msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops},
189265 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1,
190266 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
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+ {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_3_0,
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+ &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
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+ {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_0,
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+ &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
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+ {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1,
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+ &sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops},
191273 };
192274
193275 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)