hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614
kernel/arch/x86/kvm/i8254.c
....@@ -295,12 +295,24 @@
295295 if (atomic_read(&ps->reinject) == reinject)
296296 return;
297297
298
+ /*
299
+ * AMD SVM AVIC accelerates EOI write and does not trap.
300
+ * This cause in-kernel PIT re-inject mode to fail
301
+ * since it checks ps->irq_ack before kvm_set_irq()
302
+ * and relies on the ack notifier to timely queue
303
+ * the pt->worker work iterm and reinject the missed tick.
304
+ * So, deactivate APICv when PIT is in reinject mode.
305
+ */
298306 if (reinject) {
307
+ kvm_request_apicv_update(kvm, false,
308
+ APICV_INHIBIT_REASON_PIT_REINJ);
299309 /* The initial state is preserved while ps->reinject == 0. */
300310 kvm_pit_reset_reinject(pit);
301311 kvm_register_irq_ack_notifier(kvm, &ps->irq_ack_notifier);
302312 kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
303313 } else {
314
+ kvm_request_apicv_update(kvm, true,
315
+ APICV_INHIBIT_REASON_PIT_REINJ);
304316 kvm_unregister_irq_ack_notifier(kvm, &ps->irq_ack_notifier);
305317 kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
306318 }
....@@ -355,7 +367,7 @@
355367 {
356368 struct kvm_kpit_state *ps = &pit->pit_state;
357369
358
- pr_debug("load_count val is %d, channel is %d\n", val, channel);
370
+ pr_debug("load_count val is %u, channel is %d\n", val, channel);
359371
360372 /*
361373 * The largest possible initial count is 0; this is equivalent
....@@ -450,7 +462,6 @@
450462 if (channel == 3) {
451463 /* Read-Back Command. */
452464 for (channel = 0; channel < 3; channel++) {
453
- s = &pit_state->channels[channel];
454465 if (val & (2 << channel)) {
455466 if (!(val & 0x20))
456467 pit_latch_count(pit, channel);
....@@ -653,7 +664,7 @@
653664 pid_t pid_nr;
654665 int ret;
655666
656
- pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
667
+ pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL_ACCOUNT);
657668 if (!pit)
658669 return NULL;
659670