hc
2023-12-06 08f87f769b595151be1afeff53e144f543faa614
kernel/arch/powerpc/mm/mmu_decl.h
....@@ -1,3 +1,4 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
12 /*
23 * Declarations of procedures and variables shared between files
34 * in arch/ppc/mm/.
....@@ -11,17 +12,12 @@
1112 *
1213 * Derived from "arch/i386/mm/init.c"
1314 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
14
- *
15
- * This program is free software; you can redistribute it and/or
16
- * modify it under the terms of the GNU General Public License
17
- * as published by the Free Software Foundation; either version
18
- * 2 of the License, or (at your option) any later version.
19
- *
2015 */
2116 #include <linux/mm.h>
2217 #include <asm/mmu.h>
2318
2419 #ifdef CONFIG_PPC_MMU_NOHASH
20
+#include <asm/trace.h>
2521
2622 /*
2723 * On 40x and 8xx, we directly inline tlbia and tlbivax
....@@ -30,10 +26,12 @@
3026 static inline void _tlbil_all(void)
3127 {
3228 asm volatile ("sync; tlbia; isync" : : : "memory");
29
+ trace_tlbia(MMU_NO_CONTEXT);
3330 }
3431 static inline void _tlbil_pid(unsigned int pid)
3532 {
3633 asm volatile ("sync; tlbia; isync" : : : "memory");
34
+ trace_tlbia(pid);
3735 }
3836 #define _tlbil_pid_noind(pid) _tlbil_pid(pid)
3937
....@@ -55,6 +53,7 @@
5553 unsigned int tsize, unsigned int ind)
5654 {
5755 asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
56
+ trace_tlbie(0, 0, address, pid, 0, 0, 0);
5857 }
5958 #elif defined(CONFIG_PPC_BOOK3E)
6059 extern void _tlbil_va(unsigned long address, unsigned int pid,
....@@ -79,18 +78,20 @@
7978 }
8079 #endif
8180
81
+static inline void print_system_hash_info(void) {}
82
+
8283 #else /* CONFIG_PPC_MMU_NOHASH */
83
-
84
-extern void hash_preload(struct mm_struct *mm, unsigned long ea,
85
- unsigned long access, unsigned long trap);
86
-
8784
8885 extern void _tlbie(unsigned long address);
8986 extern void _tlbia(void);
9087
88
+void print_system_hash_info(void);
89
+
9190 #endif /* CONFIG_PPC_MMU_NOHASH */
9291
9392 #ifdef CONFIG_PPC32
93
+
94
+void hash_preload(struct mm_struct *mm, unsigned long ea);
9495
9596 extern void mapin_ram(void);
9697 extern void setbat(int index, unsigned long virt, phys_addr_t phys,
....@@ -100,12 +101,11 @@
100101 extern unsigned int rtas_data, rtas_size;
101102
102103 struct hash_pte;
103
-extern struct hash_pte *Hash, *Hash_end;
104
-extern unsigned long Hash_size, Hash_mask;
104
+extern struct hash_pte *Hash;
105
+extern u8 early_hash[];
105106
106107 #endif /* CONFIG_PPC32 */
107108
108
-extern unsigned long ioremap_bot;
109109 extern unsigned long __max_low_memory;
110110 extern phys_addr_t __initial_memory_limit_addr;
111111 extern phys_addr_t total_memory;
....@@ -126,7 +126,8 @@
126126 */
127127 #ifdef CONFIG_PPC32
128128 extern void MMU_init_hw(void);
129
-extern unsigned long mmu_mapin_ram(unsigned long top);
129
+void MMU_init_hw_patch(void);
130
+unsigned long mmu_mapin_ram(unsigned long base, unsigned long top);
130131 #endif
131132
132133 #ifdef CONFIG_PPC_FSL_BOOK3E
....@@ -138,9 +139,20 @@
138139 extern void adjust_total_lowmem(void);
139140 extern int switch_to_as1(void);
140141 extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu);
142
+void create_kaslr_tlb_entry(int entry, unsigned long virt, phys_addr_t phys);
143
+void reloc_kernel_entry(void *fdt, int addr);
144
+extern int is_second_reloc;
141145 #endif
142146 extern void loadcam_entry(unsigned int index);
143147 extern void loadcam_multi(int first_idx, int num, int tmp_idx);
148
+
149
+#ifdef CONFIG_RANDOMIZE_BASE
150
+void kaslr_early_init(void *dt_ptr, phys_addr_t size);
151
+void kaslr_late_init(void);
152
+#else
153
+static inline void kaslr_early_init(void *dt_ptr, phys_addr_t size) {}
154
+static inline void kaslr_late_init(void) {}
155
+#endif
144156
145157 struct tlbcam {
146158 u32 MAS0;
....@@ -151,7 +163,7 @@
151163 };
152164 #endif
153165
154
-#if defined(CONFIG_6xx) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx)
166
+#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx)
155167 /* 6xx have BATS */
156168 /* FSL_BOOKE have TLBCAM */
157169 /* 8xx have LTLB */
....@@ -161,3 +173,21 @@
161173 static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; }
162174 static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; }
163175 #endif
176
+
177
+#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_8xx)
178
+void mmu_mark_initmem_nx(void);
179
+void mmu_mark_rodata_ro(void);
180
+#else
181
+static inline void mmu_mark_initmem_nx(void) { }
182
+static inline void mmu_mark_rodata_ro(void) { }
183
+#endif
184
+
185
+#ifdef CONFIG_PPC_8xx
186
+void __init mmu_mapin_immr(void);
187
+#endif
188
+
189
+#ifdef CONFIG_PPC_DEBUG_WX
190
+void ptdump_check_wx(void);
191
+#else
192
+static inline void ptdump_check_wx(void) { }
193
+#endif