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| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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1 | 2 | /* |
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2 | 3 | * Declarations of procedures and variables shared between files |
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3 | 4 | * in arch/ppc/mm/. |
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.. | .. |
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11 | 12 | * |
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12 | 13 | * Derived from "arch/i386/mm/init.c" |
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13 | 14 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds |
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14 | | - * |
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15 | | - * This program is free software; you can redistribute it and/or |
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16 | | - * modify it under the terms of the GNU General Public License |
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17 | | - * as published by the Free Software Foundation; either version |
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18 | | - * 2 of the License, or (at your option) any later version. |
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19 | | - * |
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20 | 15 | */ |
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21 | 16 | #include <linux/mm.h> |
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22 | 17 | #include <asm/mmu.h> |
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23 | 18 | |
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24 | 19 | #ifdef CONFIG_PPC_MMU_NOHASH |
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| 20 | +#include <asm/trace.h> |
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25 | 21 | |
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26 | 22 | /* |
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27 | 23 | * On 40x and 8xx, we directly inline tlbia and tlbivax |
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.. | .. |
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30 | 26 | static inline void _tlbil_all(void) |
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31 | 27 | { |
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32 | 28 | asm volatile ("sync; tlbia; isync" : : : "memory"); |
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| 29 | + trace_tlbia(MMU_NO_CONTEXT); |
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33 | 30 | } |
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34 | 31 | static inline void _tlbil_pid(unsigned int pid) |
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35 | 32 | { |
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36 | 33 | asm volatile ("sync; tlbia; isync" : : : "memory"); |
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| 34 | + trace_tlbia(pid); |
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37 | 35 | } |
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38 | 36 | #define _tlbil_pid_noind(pid) _tlbil_pid(pid) |
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39 | 37 | |
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.. | .. |
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55 | 53 | unsigned int tsize, unsigned int ind) |
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56 | 54 | { |
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57 | 55 | asm volatile ("tlbie %0; sync" : : "r" (address) : "memory"); |
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| 56 | + trace_tlbie(0, 0, address, pid, 0, 0, 0); |
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58 | 57 | } |
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59 | 58 | #elif defined(CONFIG_PPC_BOOK3E) |
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60 | 59 | extern void _tlbil_va(unsigned long address, unsigned int pid, |
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.. | .. |
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79 | 78 | } |
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80 | 79 | #endif |
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81 | 80 | |
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| 81 | +static inline void print_system_hash_info(void) {} |
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| 82 | + |
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82 | 83 | #else /* CONFIG_PPC_MMU_NOHASH */ |
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83 | | - |
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84 | | -extern void hash_preload(struct mm_struct *mm, unsigned long ea, |
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85 | | - unsigned long access, unsigned long trap); |
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86 | | - |
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87 | 84 | |
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88 | 85 | extern void _tlbie(unsigned long address); |
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89 | 86 | extern void _tlbia(void); |
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90 | 87 | |
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| 88 | +void print_system_hash_info(void); |
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| 89 | + |
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91 | 90 | #endif /* CONFIG_PPC_MMU_NOHASH */ |
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92 | 91 | |
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93 | 92 | #ifdef CONFIG_PPC32 |
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| 93 | + |
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| 94 | +void hash_preload(struct mm_struct *mm, unsigned long ea); |
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94 | 95 | |
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95 | 96 | extern void mapin_ram(void); |
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96 | 97 | extern void setbat(int index, unsigned long virt, phys_addr_t phys, |
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.. | .. |
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100 | 101 | extern unsigned int rtas_data, rtas_size; |
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101 | 102 | |
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102 | 103 | struct hash_pte; |
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103 | | -extern struct hash_pte *Hash, *Hash_end; |
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104 | | -extern unsigned long Hash_size, Hash_mask; |
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| 104 | +extern struct hash_pte *Hash; |
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| 105 | +extern u8 early_hash[]; |
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105 | 106 | |
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106 | 107 | #endif /* CONFIG_PPC32 */ |
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107 | 108 | |
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108 | | -extern unsigned long ioremap_bot; |
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109 | 109 | extern unsigned long __max_low_memory; |
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110 | 110 | extern phys_addr_t __initial_memory_limit_addr; |
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111 | 111 | extern phys_addr_t total_memory; |
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.. | .. |
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126 | 126 | */ |
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127 | 127 | #ifdef CONFIG_PPC32 |
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128 | 128 | extern void MMU_init_hw(void); |
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129 | | -extern unsigned long mmu_mapin_ram(unsigned long top); |
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| 129 | +void MMU_init_hw_patch(void); |
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| 130 | +unsigned long mmu_mapin_ram(unsigned long base, unsigned long top); |
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130 | 131 | #endif |
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131 | 132 | |
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132 | 133 | #ifdef CONFIG_PPC_FSL_BOOK3E |
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.. | .. |
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138 | 139 | extern void adjust_total_lowmem(void); |
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139 | 140 | extern int switch_to_as1(void); |
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140 | 141 | extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu); |
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| 142 | +void create_kaslr_tlb_entry(int entry, unsigned long virt, phys_addr_t phys); |
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| 143 | +void reloc_kernel_entry(void *fdt, int addr); |
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| 144 | +extern int is_second_reloc; |
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141 | 145 | #endif |
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142 | 146 | extern void loadcam_entry(unsigned int index); |
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143 | 147 | extern void loadcam_multi(int first_idx, int num, int tmp_idx); |
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| 148 | + |
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| 149 | +#ifdef CONFIG_RANDOMIZE_BASE |
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| 150 | +void kaslr_early_init(void *dt_ptr, phys_addr_t size); |
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| 151 | +void kaslr_late_init(void); |
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| 152 | +#else |
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| 153 | +static inline void kaslr_early_init(void *dt_ptr, phys_addr_t size) {} |
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| 154 | +static inline void kaslr_late_init(void) {} |
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| 155 | +#endif |
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144 | 156 | |
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145 | 157 | struct tlbcam { |
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146 | 158 | u32 MAS0; |
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.. | .. |
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151 | 163 | }; |
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152 | 164 | #endif |
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153 | 165 | |
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154 | | -#if defined(CONFIG_6xx) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx) |
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| 166 | +#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx) |
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155 | 167 | /* 6xx have BATS */ |
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156 | 168 | /* FSL_BOOKE have TLBCAM */ |
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157 | 169 | /* 8xx have LTLB */ |
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.. | .. |
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161 | 173 | static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; } |
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162 | 174 | static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; } |
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163 | 175 | #endif |
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| 176 | + |
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| 177 | +#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_8xx) |
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| 178 | +void mmu_mark_initmem_nx(void); |
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| 179 | +void mmu_mark_rodata_ro(void); |
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| 180 | +#else |
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| 181 | +static inline void mmu_mark_initmem_nx(void) { } |
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| 182 | +static inline void mmu_mark_rodata_ro(void) { } |
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| 183 | +#endif |
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| 184 | + |
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| 185 | +#ifdef CONFIG_PPC_8xx |
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| 186 | +void __init mmu_mapin_immr(void); |
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| 187 | +#endif |
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| 188 | + |
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| 189 | +#ifdef CONFIG_PPC_DEBUG_WX |
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| 190 | +void ptdump_check_wx(void); |
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| 191 | +#else |
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| 192 | +static inline void ptdump_check_wx(void) { } |
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| 193 | +#endif |
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