add dts config

hc

2023-12-06 08f87f769b595151be1afeff53e144f543faa614

 kernel/arch/arm/boot/dts/stm32h743.dtsi
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@@ -40,13 +40,15 @@
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  *     OTHER DEALINGS IN THE SOFTWARE.
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  */
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-#include "skeleton.dtsi"
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 #include "armv7-m.dtsi"
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 #include <dt-bindings/clock/stm32h7-clks.h>
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 #include <dt-bindings/mfd/stm32h7-rcc.h>
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 #include <dt-bindings/interrupt-controller/irq.h>
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 / {
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+	#address-cells = <1>;
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+	#size-cells = <1>;
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+
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 	clocks {
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 		clk_hse: clk-hse {
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 			#clock-cells = <0>;
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@@ -108,6 +110,7 @@
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 			compatible = "st,stm32h7-spi";
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 			reg = <0x40003800 0x400>;
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 			interrupts = <36>;
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+			resets = <&rcc STM32H7_APB1L_RESET(SPI2)>;
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 			clocks = <&rcc SPI2_CK>;
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 			status = "disabled";
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@@ -119,12 +122,13 @@
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 			compatible = "st,stm32h7-spi";
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 			reg = <0x40003c00 0x400>;
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 			interrupts = <51>;
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+			resets = <&rcc STM32H7_APB1L_RESET(SPI3)>;
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 			clocks = <&rcc SPI3_CK>;
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 			status = "disabled";
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 		};
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 		usart2: serial@40004400 {
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-			compatible = "st,stm32f7-uart";
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+			compatible = "st,stm32h7-uart";
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 			reg = <0x40004400 0x400>;
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 			interrupts = <38>;
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 			status = "disabled";
..
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@@ -178,21 +182,21 @@
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 			dac1: dac@1 {
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 				compatible = "st,stm32-dac";
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-				#io-channels-cells = <1>;
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+				#io-channel-cells = <1>;
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 				reg = <1>;
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 				status = "disabled";
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 			};
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 			dac2: dac@2 {
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 				compatible = "st,stm32-dac";
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-				#io-channels-cells = <1>;
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+				#io-channel-cells = <1>;
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 				reg = <2>;
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 				status = "disabled";
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 			};
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 		};
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 		usart1: serial@40011000 {
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-			compatible = "st,stm32f7-uart";
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+			compatible = "st,stm32h7-uart";
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 			reg = <0x40011000 0x400>;
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 			interrupts = <37>;
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 			status = "disabled";
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@@ -205,6 +209,7 @@
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 			compatible = "st,stm32h7-spi";
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 			reg = <0x40013000 0x400>;
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 			interrupts = <35>;
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+			resets = <&rcc STM32H7_APB2_RESET(SPI1)>;
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 			clocks = <&rcc SPI1_CK>;
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 			status = "disabled";
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 		};
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@@ -215,6 +220,7 @@
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 			compatible = "st,stm32h7-spi";
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 			reg = <0x40013400 0x400>;
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 			interrupts = <84>;
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+			resets = <&rcc STM32H7_APB2_RESET(SPI4)>;
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 			clocks = <&rcc SPI4_CK>;
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 			status = "disabled";
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 		};
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@@ -225,11 +231,12 @@
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 			compatible = "st,stm32h7-spi";
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 			reg = <0x40015000 0x400>;
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 			interrupts = <85>;
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+			resets = <&rcc STM32H7_APB2_RESET(SPI5)>;
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 			clocks = <&rcc SPI5_CK>;
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 			status = "disabled";
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 		};
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-		dma1: dma@40020000 {
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+		dma1: dma-controller@40020000 {
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 			compatible = "st,stm32-dma";
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 			reg = <0x40020000 0x400>;
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 			interrupts = <11>,
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@@ -247,7 +254,7 @@
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 			status = "disabled";
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 		};
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-		dma2: dma@40020400 {
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+		dma2: dma-controller@40020400 {
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 			compatible = "st,stm32-dma";
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 			reg = <0x40020400 0x400>;
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 			interrupts = <56>,
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@@ -327,7 +334,17 @@
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 			status = "disabled";
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 		};
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-		mdma1: dma@52000000 {
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+		ltdc: display-controller@50001000 {
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+			compatible = "st,stm32-ltdc";
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+			reg = <0x50001000 0x200>;
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+			interrupts = <88>, <89>;
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+			resets = <&rcc STM32H7_APB3_RESET(LTDC)>;
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+			clocks = <&rcc LTDC_CK>;
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+			clock-names = "lcd";
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+			status = "disabled";
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+		};
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+
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+		mdma1: dma-controller@52000000 {
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 			compatible = "st,stm32h7-mdma";
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 			reg = <0x52000000 0x1000>;
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 			interrupts = <122>;
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@@ -335,6 +352,20 @@
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 			#dma-cells = <5>;
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 			dma-channels = <16>;
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 			dma-requests = <32>;
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+		};
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+
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+		sdmmc1: sdmmc@52007000 {
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+			compatible = "arm,pl18x", "arm,primecell";
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+			arm,primecell-periphid = <0x10153180>;
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+			reg = <0x52007000 0x1000>;
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+			interrupts = <49>;
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+			interrupt-names	= "cmd_irq";
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+			clocks = <&rcc SDMMC1_CK>;
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+			clock-names = "apb_pclk";
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+			resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>;
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+			cap-sd-highspeed;
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+			cap-mmc-highspeed;
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+			max-frequency = <120000000>;
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 		};
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 		exti: interrupt-controller@58000000 {
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@@ -345,8 +376,8 @@
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 			interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <62>, <76>;
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 		};
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-		syscfg: system-config@58000400 {
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-			compatible = "syscon";
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+		syscfg: syscon@58000400 {
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+			compatible = "st,stm32-syscfg", "syscon";
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 			reg = <0x58000400 0x400>;
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 		};
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@@ -356,6 +387,7 @@
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 			compatible = "st,stm32h7-spi";
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 			reg = <0x58001400 0x400>;
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 			interrupts = <86>;
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+			resets = <&rcc STM32H7_APB4_RESET(SPI6)>;
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 			clocks = <&rcc SPI6_CK>;
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 			status = "disabled";
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 		};
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@@ -467,8 +499,7 @@
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 			assigned-clock-parents = <&rcc LSE_CK>;
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 			interrupt-parent = <&exti>;
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 			interrupts = <17 IRQ_TYPE_EDGE_RISING>;
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-			interrupt-names = "alarm";
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-			st,syscfg = <&pwrcfg>;
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+			st,syscfg = <&pwrcfg 0x00 0x100>;
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 			status = "disabled";
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 		};
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..
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@@ -482,7 +513,7 @@
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 		};
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 		pwrcfg: power-config@58024800 {
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-			compatible = "syscon";
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+			compatible = "st,stm32-power-config", "syscon";
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 			reg = <0x58024800 0x400>;
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 		};
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@@ -507,6 +538,19 @@
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 				status = "disabled";
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 			};
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 		};
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+
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+		mac: ethernet@40028000 {
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+			compatible = "st,stm32-dwmac", "snps,dwmac-4.10a";
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+			reg = <0x40028000 0x8000>;
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+			reg-names = "stmmaceth";
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+			interrupts = <61>;
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+			interrupt-names = "macirq";
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+			clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
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+			clocks = <&rcc ETH1MAC_CK>, <&rcc ETH1TX_CK>, <&rcc ETH1RX_CK>;
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+			st,syscon = <&syscfg 0x4>;
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+			snps,pbl = <8>;
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+			status = "disabled";
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+		};
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 	};
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 };
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