~ljy/RK356X_SDK_RELEASE.git

..	..	@@ -7,6 +7,7 @@
7	7
8	8	/dts-v1/;
9	9	#include "rk3288-veyron-chromebook.dtsi"
	10	+#include "rk3288-veyron-broadcom-bluetooth.dtsi"
10	11
11	12	/ {
12	13	model = "Google Minnie";
..	..	@@ -15,97 +16,31 @@
15	16	"google,veyron-minnie-rev0", "google,veyron-minnie",
16	17	"google,veyron", "rockchip,rk3288";
17	18
18		- backlight_regulator: backlight-regulator {
19		- compatible = "regulator-fixed";
20		- enable-active-high;
21		- gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
	19	+ volume_buttons: volume-buttons {
	20	+ compatible = "gpio-keys";
22	21	pinctrl-names = "default";
23		- pinctrl-0 = <&bl_pwr_en>;
24		- regulator-name = "backlight_regulator";
25		- vin-supply = <&vcc33_sys>;
26		- startup-delay-us = <15000>;
27		- };
	22	+ pinctrl-0 = <&volum_down_l &volum_up_l>;
28	23
29		- panel_regulator: panel-regulator {
30		- compatible = "regulator-fixed";
31		- enable-active-high;
32		- gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
33		- pinctrl-names = "default";
34		- pinctrl-0 = <&lcd_enable_h>;
35		- regulator-name = "panel_regulator";
36		- startup-delay-us = <100000>;
37		- vin-supply = <&vcc33_sys>;
38		- };
	24	+ volum_down {
	25	+ label = "Volum_down";
	26	+ gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>;
	27	+ linux,code = <KEY_VOLUMEDOWN>;
	28	+ debounce-interval = <100>;
	29	+ };
39	30
40		- vcc18_lcd: vcc18-lcd {
41		- compatible = "regulator-fixed";
42		- enable-active-high;
43		- gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
44		- pinctrl-names = "default";
45		- pinctrl-0 = <&avdd_1v8_disp_en>;
46		- regulator-name = "vcc18_lcd";
47		- regulator-always-on;
48		- regulator-boot-on;
49		- vin-supply = <&vcc18_wl>;
	31	+ volum_up {
	32	+ label = "Volum_up";
	33	+ gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>;
	34	+ linux,code = <KEY_VOLUMEUP>;
	35	+ debounce-interval = <100>;
	36	+ };
50	37	};
51	38	};
52	39
53	40	&backlight {
54	41	/* Minnie panel PWM must be >= 1%, so start non-zero brightness at 3 */
55		- brightness-levels = <
56		- 0 3 4 5 6 7
57		- 8 9 10 11 12 13 14 15
58		- 16 17 18 19 20 21 22 23
59		- 24 25 26 27 28 29 30 31
60		- 32 33 34 35 36 37 38 39
61		- 40 41 42 43 44 45 46 47
62		- 48 49 50 51 52 53 54 55
63		- 56 57 58 59 60 61 62 63
64		- 64 65 66 67 68 69 70 71
65		- 72 73 74 75 76 77 78 79
66		- 80 81 82 83 84 85 86 87
67		- 88 89 90 91 92 93 94 95
68		- 96 97 98 99 100 101 102 103
69		- 104 105 106 107 108 109 110 111
70		- 112 113 114 115 116 117 118 119
71		- 120 121 122 123 124 125 126 127
72		- 128 129 130 131 132 133 134 135
73		- 136 137 138 139 140 141 142 143
74		- 144 145 146 147 148 149 150 151
75		- 152 153 154 155 156 157 158 159
76		- 160 161 162 163 164 165 166 167
77		- 168 169 170 171 172 173 174 175
78		- 176 177 178 179 180 181 182 183
79		- 184 185 186 187 188 189 190 191
80		- 192 193 194 195 196 197 198 199
81		- 200 201 202 203 204 205 206 207
82		- 208 209 210 211 212 213 214 215
83		- 216 217 218 219 220 221 222 223
84		- 224 225 226 227 228 229 230 231
85		- 232 233 234 235 236 237 238 239
86		- 240 241 242 243 244 245 246 247
87		- 248 249 250 251 252 253 254 255>;
88		- power-supply = <&backlight_regulator>;
89		- post-pwm-on-delay-ms = <200>;
90		- pwm-off-delay-ms = <200>;
91		-};
92		-
93		-&gpio_keys {
94		- pinctrl-0 = <&pwr_key_l &ap_lid_int_l &volum_down_l &volum_up_l>;
95		-
96		- volum_down {
97		- label = "Volum_down";
98		- gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>;
99		- linux,code = <KEY_VOLUMEDOWN>;
100		- debounce-interval = <100>;
101		- };
102		-
103		- volum_up {
104		- label = "Volum_up";
105		- gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>;
106		- linux,code = <KEY_VOLUMEUP>;
107		- debounce-interval = <100>;
108		- };
	42	+ brightness-levels = <0 3 255>;
	43	+ num-interpolated-steps = <252>;
109	44	};
110	45
111	46	&i2c_tunnel {
..	..	@@ -136,8 +71,21 @@
136	71	};
137	72
138	73	&panel {
139		- compatible = "auo,b101ean01", "simple-panel";
140		- power-supply= <&panel_regulator>;
	74	+ compatible = "auo,b101ean01";
	75	+
	76	+ /delete-node/ panel-timing;
	77	+
	78	+ panel-timing {
	79	+ clock-frequency = <66666667>;
	80	+ hactive = <1280>;
	81	+ hfront-porch = <18>;
	82	+ hback-porch = <21>;
	83	+ hsync-len = <32>;
	84	+ vactive = <800>;
	85	+ vfront-porch = <4>;
	86	+ vback-porch = <8>;
	87	+ vsync-len = <18>;
	88	+ };
141	89	};
142	90
143	91	&rk808 {
..	..	@@ -166,7 +114,7 @@
166	114	&sdmmc {
167	115	disable-wp;
168	116	pinctrl-names = "default";
169		- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
	117	+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
170	118	&sdmmc_bus4>;
171	119	};
172	120
..	..	@@ -184,12 +132,238 @@
184	132	pinctrl-0 = <&vcc50_hdmi_en>;
185	133	};
186	134
	135	+&gpio0 {
	136	+ gpio-line-names = "PMIC_SLEEP_AP",
	137	+ "DDRIO_PWROFF",
	138	+ "DDRIO_RETEN",
	139	+ "TS3A227E_INT_L",
	140	+ "PMIC_INT_L",
	141	+ "PWR_KEY_L",
	142	+ "AP_LID_INT_L",
	143	+ "EC_IN_RW",
	144	+
	145	+ "AC_PRESENT_AP",
	146	+ /*
	147	+ * RECOVERY_SW_L is Chrome OS ABI. Schematics call
	148	+ * it REC_MODE_L.
	149	+ */
	150	+ "RECOVERY_SW_L",
	151	+ "OTP_OUT",
	152	+ "HOST1_PWR_EN",
	153	+ "USBOTG_PWREN_H",
	154	+ "AP_WARM_RESET_H",
	155	+ "nFALUT2",
	156	+ "I2C0_SDA_PMIC",
	157	+
	158	+ "I2C0_SCL_PMIC",
	159	+ "SUSPEND_L",
	160	+ "USB_INT";
	161	+};
	162	+
	163	+&gpio2 {
	164	+ gpio-line-names = "CONFIG0",
	165	+ "CONFIG1",
	166	+ "CONFIG2",
	167	+ "",
	168	+ "",
	169	+ "",
	170	+ "",
	171	+ "CONFIG3",
	172	+
	173	+ "PROCHOT#",
	174	+ "EMMC_RST_L",
	175	+ "",
	176	+ "",
	177	+ "BL_PWR_EN",
	178	+ "AVDD_1V8_DISP_EN",
	179	+ "TOUCH_INT",
	180	+ "TOUCH_RST",
	181	+
	182	+ "I2C3_SCL_TP",
	183	+ "I2C3_SDA_TP";
	184	+};
	185	+
	186	+&gpio3 {
	187	+ gpio-line-names = "FLASH0_D0",
	188	+ "FLASH0_D1",
	189	+ "FLASH0_D2",
	190	+ "FLASH0_D3",
	191	+ "FLASH0_D4",
	192	+ "FLASH0_D5",
	193	+ "FLASH0_D6",
	194	+ "FLASH0_D7",
	195	+
	196	+ "",
	197	+ "",
	198	+ "",
	199	+ "",
	200	+ "",
	201	+ "",
	202	+ "",
	203	+ "",
	204	+
	205	+ "FLASH0_CS2/EMMC_CMD",
	206	+ "",
	207	+ "FLASH0_DQS/EMMC_CLKO";
	208	+};
	209	+
	210	+&gpio4 {
	211	+ gpio-line-names = "",
	212	+ "",
	213	+ "",
	214	+ "",
	215	+ "",
	216	+ "",
	217	+ "",
	218	+ "",
	219	+
	220	+ "",
	221	+ "",
	222	+ "",
	223	+ "",
	224	+ "",
	225	+ "",
	226	+ "",
	227	+ "",
	228	+
	229	+ "UART0_RXD",
	230	+ "UART0_TXD",
	231	+ "UART0_CTS",
	232	+ "UART0_RTS",
	233	+ "SDIO0_D0",
	234	+ "SDIO0_D1",
	235	+ "SDIO0_D2",
	236	+ "SDIO0_D3",
	237	+
	238	+ "SDIO0_CMD",
	239	+ "SDIO0_CLK",
	240	+ "dev_wake",
	241	+ "",
	242	+ "WIFI_ENABLE_H",
	243	+ "BT_ENABLE_L",
	244	+ "WIFI_HOST_WAKE",
	245	+ "BT_HOST_WAKE";
	246	+};
	247	+
	248	+&gpio5 {
	249	+ gpio-line-names = "",
	250	+ "",
	251	+ "",
	252	+ "",
	253	+ "",
	254	+ "",
	255	+ "",
	256	+ "",
	257	+
	258	+ "",
	259	+ "",
	260	+ "Volum_Up#",
	261	+ "Volum_Down#",
	262	+ "SPI0_CLK",
	263	+ "SPI0_CS0",
	264	+ "SPI0_TXD",
	265	+ "SPI0_RXD",
	266	+
	267	+ "",
	268	+ "",
	269	+ "",
	270	+ "VCC50_HDMI_EN";
	271	+};
	272	+
	273	+&gpio6 {
	274	+ gpio-line-names = "I2S0_SCLK",
	275	+ "I2S0_LRCK_RX",
	276	+ "I2S0_LRCK_TX",
	277	+ "I2S0_SDI",
	278	+ "I2S0_SDO0",
	279	+ "HP_DET_H",
	280	+ "",
	281	+ "INT_CODEC",
	282	+
	283	+ "I2S0_CLK",
	284	+ "I2C2_SDA",
	285	+ "I2C2_SCL",
	286	+ "MICDET",
	287	+ "",
	288	+ "",
	289	+ "",
	290	+ "",
	291	+
	292	+ "SDMMC_D0",
	293	+ "SDMMC_D1",
	294	+ "SDMMC_D2",
	295	+ "SDMMC_D3",
	296	+ "SDMMC_CLK",
	297	+ "SDMMC_CMD";
	298	+};
	299	+
	300	+&gpio7 {
	301	+ gpio-line-names = "LCDC_BL",
	302	+ "PWM_LOG",
	303	+ "BL_EN",
	304	+ "TRACKPAD_INT",
	305	+ "TPM_INT_H",
	306	+ "SDMMC_DET_L",
	307	+ /*
	308	+ * AP_FLASH_WP_L is Chrome OS ABI. Schematics call
	309	+ * it FW_WP_AP.
	310	+ */
	311	+ "AP_FLASH_WP_L",
	312	+ "EC_INT",
	313	+
	314	+ "CPU_NMI",
	315	+ "DVS_OK",
	316	+ "SDMMC_WP",
	317	+ "EDP_HPD",
	318	+ "DVS1",
	319	+ "nFALUT1",
	320	+ "LCD_EN",
	321	+ "DVS2",
	322	+
	323	+ "VCC5V_GOOD_H",
	324	+ "I2C4_SDA_TP",
	325	+ "I2C4_SCL_TP",
	326	+ "I2C5_SDA_HDMI",
	327	+ "I2C5_SCL_HDMI",
	328	+ "5V_DRV",
	329	+ "UART2_RXD",
	330	+ "UART2_TXD";
	331	+};
	332	+
	333	+&gpio8 {
	334	+ gpio-line-names = "RAM_ID0",
	335	+ "RAM_ID1",
	336	+ "RAM_ID2",
	337	+ "RAM_ID3",
	338	+ "I2C1_SDA_TPM",
	339	+ "I2C1_SCL_TPM",
	340	+ "SPI2_CLK",
	341	+ "SPI2_CS0",
	342	+
	343	+ "SPI2_RXD",
	344	+ "SPI2_TXD";
	345	+};
	346	+
187	347	&pinctrl {
188		- backlight {
189		- bl_pwr_en: bl_pwr_en {
190		- rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
191		- };
192		- };
	348	+ pinctrl-names = "default", "sleep";
	349	+ pinctrl-0 = <
	350	+ /* Common for sleep and wake, but no owners */
	351	+ &ddr0_retention
	352	+ &ddrio_pwroff
	353	+ &global_pwroff
	354	+
	355	+ /* Wake only */
	356	+ &suspend_l_wake
	357	+ >;
	358	+ pinctrl-1 = <
	359	+ /* Common for sleep and wake, but no owners */
	360	+ &ddr0_retention
	361	+ &ddrio_pwroff
	362	+ &global_pwroff
	363	+
	364	+ /* Sleep only */
	365	+ &suspend_l_sleep
	366	+ >;
193	367
194	368	buck-5v {
195	369	drv_5v: drv-5v {
..	..	@@ -210,16 +384,6 @@
210	384	hdmi {
211	385	vcc50_hdmi_en: vcc50-hdmi-en {
212	386	rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
213		- };
214		- };
215		-
216		- lcd {
217		- lcd_enable_h: lcd-en {
218		- rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
219		- };
220		-
221		- avdd_1v8_disp_en: avdd-1v8-disp-en {
222		- rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
223	387	};
224	388	};
225	389