hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d
kernel/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h
....@@ -1,16 +1,7 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*
23 * intel_pt_decoder.h: Intel Processor Trace support
34 * Copyright (c) 2013-2014, Intel Corporation.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
6
- * under the terms and conditions of the GNU General Public License,
7
- * version 2, as published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope it will be useful, but WITHOUT
10
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12
- * more details.
13
- *
145 */
156
167 #ifndef INCLUDE__INTEL_PT_DECODER_H__
....@@ -26,6 +17,7 @@
2617 #define INTEL_PT_ABORT_TX (1 << 1)
2718 #define INTEL_PT_ASYNC (1 << 2)
2819 #define INTEL_PT_FUP_IP (1 << 3)
20
+#define INTEL_PT_SAMPLE_IPC (1 << 4)
2921
3022 enum intel_pt_sample_type {
3123 INTEL_PT_BRANCH = 1 << 0,
....@@ -37,6 +29,9 @@
3729 INTEL_PT_EX_STOP = 1 << 6,
3830 INTEL_PT_PWR_EXIT = 1 << 7,
3931 INTEL_PT_CBR_CHG = 1 << 8,
32
+ INTEL_PT_TRACE_BEGIN = 1 << 9,
33
+ INTEL_PT_TRACE_END = 1 << 10,
34
+ INTEL_PT_BLK_ITEMS = 1 << 11,
4035 };
4136
4237 enum intel_pt_period_type {
....@@ -68,6 +63,141 @@
6863 INTEL_PT_FUP_WITH_NLIP = 1 << 0,
6964 };
7065
66
+enum intel_pt_blk_type {
67
+ INTEL_PT_GP_REGS = 1,
68
+ INTEL_PT_PEBS_BASIC = 4,
69
+ INTEL_PT_PEBS_MEM = 5,
70
+ INTEL_PT_LBR_0 = 8,
71
+ INTEL_PT_LBR_1 = 9,
72
+ INTEL_PT_LBR_2 = 10,
73
+ INTEL_PT_XMM = 16,
74
+ INTEL_PT_BLK_TYPE_MAX
75
+};
76
+
77
+/*
78
+ * The block type numbers are not sequential but here they are given sequential
79
+ * positions to avoid wasting space for array placement.
80
+ */
81
+enum intel_pt_blk_type_pos {
82
+ INTEL_PT_GP_REGS_POS,
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+ INTEL_PT_PEBS_BASIC_POS,
84
+ INTEL_PT_PEBS_MEM_POS,
85
+ INTEL_PT_LBR_0_POS,
86
+ INTEL_PT_LBR_1_POS,
87
+ INTEL_PT_LBR_2_POS,
88
+ INTEL_PT_XMM_POS,
89
+ INTEL_PT_BLK_TYPE_CNT
90
+};
91
+
92
+/* Get the array position for a block type */
93
+static inline int intel_pt_blk_type_pos(enum intel_pt_blk_type blk_type)
94
+{
95
+#define BLK_TYPE(bt) [INTEL_PT_##bt] = INTEL_PT_##bt##_POS + 1
96
+ const int map[INTEL_PT_BLK_TYPE_MAX] = {
97
+ BLK_TYPE(GP_REGS),
98
+ BLK_TYPE(PEBS_BASIC),
99
+ BLK_TYPE(PEBS_MEM),
100
+ BLK_TYPE(LBR_0),
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+ BLK_TYPE(LBR_1),
102
+ BLK_TYPE(LBR_2),
103
+ BLK_TYPE(XMM),
104
+ };
105
+#undef BLK_TYPE
106
+
107
+ return blk_type < INTEL_PT_BLK_TYPE_MAX ? map[blk_type] - 1 : -1;
108
+}
109
+
110
+#define INTEL_PT_BLK_ITEM_ID_CNT 32
111
+
112
+/*
113
+ * Use unions so that the block items can be accessed by name or by array index.
114
+ * There is an array of 32-bit masks for each block type, which indicate which
115
+ * values are present. Then arrays of 32 64-bit values for each block type.
116
+ */
117
+struct intel_pt_blk_items {
118
+ union {
119
+ uint32_t mask[INTEL_PT_BLK_TYPE_CNT];
120
+ struct {
121
+ uint32_t has_rflags:1;
122
+ uint32_t has_rip:1;
123
+ uint32_t has_rax:1;
124
+ uint32_t has_rcx:1;
125
+ uint32_t has_rdx:1;
126
+ uint32_t has_rbx:1;
127
+ uint32_t has_rsp:1;
128
+ uint32_t has_rbp:1;
129
+ uint32_t has_rsi:1;
130
+ uint32_t has_rdi:1;
131
+ uint32_t has_r8:1;
132
+ uint32_t has_r9:1;
133
+ uint32_t has_r10:1;
134
+ uint32_t has_r11:1;
135
+ uint32_t has_r12:1;
136
+ uint32_t has_r13:1;
137
+ uint32_t has_r14:1;
138
+ uint32_t has_r15:1;
139
+ uint32_t has_unused_0:14;
140
+ uint32_t has_ip:1;
141
+ uint32_t has_applicable_counters:1;
142
+ uint32_t has_timestamp:1;
143
+ uint32_t has_unused_1:29;
144
+ uint32_t has_mem_access_address:1;
145
+ uint32_t has_mem_aux_info:1;
146
+ uint32_t has_mem_access_latency:1;
147
+ uint32_t has_tsx_aux_info:1;
148
+ uint32_t has_unused_2:28;
149
+ uint32_t has_lbr_0;
150
+ uint32_t has_lbr_1;
151
+ uint32_t has_lbr_2;
152
+ uint32_t has_xmm;
153
+ };
154
+ };
155
+ union {
156
+ uint64_t val[INTEL_PT_BLK_TYPE_CNT][INTEL_PT_BLK_ITEM_ID_CNT];
157
+ struct {
158
+ struct {
159
+ uint64_t rflags;
160
+ uint64_t rip;
161
+ uint64_t rax;
162
+ uint64_t rcx;
163
+ uint64_t rdx;
164
+ uint64_t rbx;
165
+ uint64_t rsp;
166
+ uint64_t rbp;
167
+ uint64_t rsi;
168
+ uint64_t rdi;
169
+ uint64_t r8;
170
+ uint64_t r9;
171
+ uint64_t r10;
172
+ uint64_t r11;
173
+ uint64_t r12;
174
+ uint64_t r13;
175
+ uint64_t r14;
176
+ uint64_t r15;
177
+ uint64_t unused_0[INTEL_PT_BLK_ITEM_ID_CNT - 18];
178
+ };
179
+ struct {
180
+ uint64_t ip;
181
+ uint64_t applicable_counters;
182
+ uint64_t timestamp;
183
+ uint64_t unused_1[INTEL_PT_BLK_ITEM_ID_CNT - 3];
184
+ };
185
+ struct {
186
+ uint64_t mem_access_address;
187
+ uint64_t mem_aux_info;
188
+ uint64_t mem_access_latency;
189
+ uint64_t tsx_aux_info;
190
+ uint64_t unused_2[INTEL_PT_BLK_ITEM_ID_CNT - 4];
191
+ };
192
+ uint64_t lbr_0[INTEL_PT_BLK_ITEM_ID_CNT];
193
+ uint64_t lbr_1[INTEL_PT_BLK_ITEM_ID_CNT];
194
+ uint64_t lbr_2[INTEL_PT_BLK_ITEM_ID_CNT];
195
+ uint64_t xmm[INTEL_PT_BLK_ITEM_ID_CNT];
196
+ };
197
+ };
198
+ bool is_32_bit;
199
+};
200
+
71201 struct intel_pt_state {
72202 enum intel_pt_sample_type type;
73203 int err;
....@@ -75,6 +205,7 @@
75205 uint64_t to_ip;
76206 uint64_t cr3;
77207 uint64_t tot_insn_cnt;
208
+ uint64_t tot_cyc_cnt;
78209 uint64_t timestamp;
79210 uint64_t est_timestamp;
80211 uint64_t trace_nr;
....@@ -83,10 +214,12 @@
83214 uint64_t pwre_payload;
84215 uint64_t pwrx_payload;
85216 uint64_t cbr_payload;
217
+ uint32_t cbr;
86218 uint32_t flags;
87219 enum intel_pt_insn_op insn_op;
88220 int insn_len;
89221 char insn[INTEL_PT_INSN_BUF_SZ];
222
+ struct intel_pt_blk_items items;
90223 };
91224
92225 struct intel_pt_insn;
....@@ -99,15 +232,19 @@
99232 uint64_t trace_nr;
100233 };
101234
235
+typedef int (*intel_pt_lookahead_cb_t)(struct intel_pt_buffer *, void *);
236
+
102237 struct intel_pt_params {
103238 int (*get_trace)(struct intel_pt_buffer *buffer, void *data);
104239 int (*walk_insn)(struct intel_pt_insn *intel_pt_insn,
105240 uint64_t *insn_cnt_ptr, uint64_t *ip, uint64_t to_ip,
106241 uint64_t max_insn_cnt, void *data);
107242 bool (*pgd_ip)(uint64_t ip, void *data);
243
+ int (*lookahead)(void *data, intel_pt_lookahead_cb_t cb, void *cb_data);
108244 void *data;
109245 bool return_compression;
110246 bool branch_enable;
247
+ uint64_t ctl;
111248 uint64_t period;
112249 enum intel_pt_period_type period_type;
113250 unsigned max_non_turbo_ratio;
....@@ -115,6 +252,7 @@
115252 uint32_t tsc_ctc_ratio_n;
116253 uint32_t tsc_ctc_ratio_d;
117254 enum intel_pt_param_flags flags;
255
+ unsigned int quick;
118256 };
119257
120258 struct intel_pt_decoder;
....@@ -124,6 +262,8 @@
124262
125263 const struct intel_pt_state *intel_pt_decode(struct intel_pt_decoder *decoder);
126264
265
+int intel_pt_fast_forward(struct intel_pt_decoder *decoder, uint64_t timestamp);
266
+
127267 unsigned char *intel_pt_find_overlap(unsigned char *buf_a, size_t len_a,
128268 unsigned char *buf_b, size_t len_b,
129269 bool have_tsc, bool *consecutive);