.. | .. |
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3 | 3 | * Freescale Management Complex (MC) bus public interface |
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4 | 4 | * |
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5 | 5 | * Copyright (C) 2014-2016 Freescale Semiconductor, Inc. |
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| 6 | + * Copyright 2019-2020 NXP |
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6 | 7 | * Author: German Rivera <German.Rivera@freescale.com> |
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7 | 8 | * |
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8 | 9 | */ |
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.. | .. |
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148 | 149 | */ |
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149 | 150 | #define FSL_MC_IS_DPRC 0x0001 |
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150 | 151 | |
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| 152 | +/* Region flags */ |
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| 153 | +/* Indicates that region can be mapped as cacheable */ |
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| 154 | +#define FSL_MC_REGION_CACHEABLE 0x00000001 |
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| 155 | + |
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| 156 | +/* Indicates that region can be mapped as shareable */ |
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| 157 | +#define FSL_MC_REGION_SHAREABLE 0x00000002 |
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| 158 | + |
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151 | 159 | /** |
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152 | 160 | * struct fsl_mc_device - MC object device object |
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153 | 161 | * @dev: Linux driver model device object |
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.. | .. |
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161 | 169 | * @regions: pointer to array of MMIO region entries |
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162 | 170 | * @irqs: pointer to array of pointers to interrupts allocated to this device |
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163 | 171 | * @resource: generic resource associated with this MC object device, if any. |
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| 172 | + * @driver_override: driver name to force a match |
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164 | 173 | * |
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165 | 174 | * Generic device object for MC object devices that are "attached" to a |
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166 | 175 | * MC bus. |
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.. | .. |
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186 | 195 | struct device dev; |
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187 | 196 | u64 dma_mask; |
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188 | 197 | u16 flags; |
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189 | | - u16 icid; |
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| 198 | + u32 icid; |
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190 | 199 | u16 mc_handle; |
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191 | 200 | struct fsl_mc_io *mc_io; |
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192 | 201 | struct fsl_mc_obj_desc obj_desc; |
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193 | 202 | struct resource *regions; |
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194 | 203 | struct fsl_mc_device_irq **irqs; |
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195 | 204 | struct fsl_mc_resource *resource; |
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| 205 | + struct device_link *consumer_link; |
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| 206 | + char *driver_override; |
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196 | 207 | }; |
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197 | 208 | |
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198 | 209 | #define to_fsl_mc_device(_dev) \ |
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.. | .. |
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210 | 221 | }; |
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211 | 222 | |
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212 | 223 | struct fsl_mc_command { |
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213 | | - u64 header; |
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214 | | - u64 params[MC_CMD_NUM_OF_PARAMS]; |
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| 224 | + __le64 header; |
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| 225 | + __le64 params[MC_CMD_NUM_OF_PARAMS]; |
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215 | 226 | }; |
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216 | 227 | |
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217 | 228 | enum mc_cmd_status { |
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.. | .. |
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238 | 249 | /* Command completion flag */ |
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239 | 250 | #define MC_CMD_FLAG_INTR_DIS 0x01 |
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240 | 251 | |
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241 | | -static inline u64 mc_encode_cmd_header(u16 cmd_id, |
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242 | | - u32 cmd_flags, |
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243 | | - u16 token) |
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| 252 | +static inline __le64 mc_encode_cmd_header(u16 cmd_id, |
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| 253 | + u32 cmd_flags, |
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| 254 | + u16 token) |
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244 | 255 | { |
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245 | | - u64 header = 0; |
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| 256 | + __le64 header = 0; |
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246 | 257 | struct mc_cmd_header *hdr = (struct mc_cmd_header *)&header; |
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247 | 258 | |
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248 | 259 | hdr->cmd_id = cpu_to_le16(cmd_id); |
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.. | .. |
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338 | 349 | * This field is only meaningful if the |
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339 | 350 | * FSL_MC_IO_ATOMIC_CONTEXT_PORTAL flag is set |
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340 | 351 | */ |
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341 | | - spinlock_t spinlock; /* serializes mc_send_command() */ |
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| 352 | + raw_spinlock_t spinlock; /* serializes mc_send_command() */ |
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342 | 353 | }; |
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343 | 354 | }; |
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344 | 355 | |
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.. | .. |
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350 | 361 | /* If fsl-mc bus is not present device cannot belong to fsl-mc bus */ |
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351 | 362 | #define dev_is_fsl_mc(_dev) (0) |
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352 | 363 | #endif |
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| 364 | + |
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| 365 | +/* Macro to check if a device is a container device */ |
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| 366 | +#define fsl_mc_is_cont_dev(_dev) (to_fsl_mc_device(_dev)->flags & \ |
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| 367 | + FSL_MC_IS_DPRC) |
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| 368 | + |
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| 369 | +/* Macro to get the container device of a MC device */ |
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| 370 | +#define fsl_mc_cont_dev(_dev) (fsl_mc_is_cont_dev(_dev) ? \ |
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| 371 | + (_dev) : (_dev)->parent) |
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353 | 372 | |
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354 | 373 | /* |
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355 | 374 | * module_fsl_mc_driver() - Helper macro for drivers that don't do |
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.. | .. |
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371 | 390 | struct module *owner); |
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372 | 391 | |
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373 | 392 | void fsl_mc_driver_unregister(struct fsl_mc_driver *driver); |
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| 393 | + |
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| 394 | +/** |
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| 395 | + * struct fsl_mc_version |
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| 396 | + * @major: Major version number: incremented on API compatibility changes |
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| 397 | + * @minor: Minor version number: incremented on API additions (that are |
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| 398 | + * backward compatible); reset when major version is incremented |
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| 399 | + * @revision: Internal revision number: incremented on implementation changes |
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| 400 | + * and/or bug fixes that have no impact on API |
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| 401 | + */ |
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| 402 | +struct fsl_mc_version { |
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| 403 | + u32 major; |
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| 404 | + u32 minor; |
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| 405 | + u32 revision; |
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| 406 | +}; |
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| 407 | + |
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| 408 | +struct fsl_mc_version *fsl_mc_get_version(void); |
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374 | 409 | |
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375 | 410 | int __must_check fsl_mc_portal_allocate(struct fsl_mc_device *mc_dev, |
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376 | 411 | u16 mc_io_flags, |
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.. | .. |
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394 | 429 | |
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395 | 430 | void fsl_mc_free_irqs(struct fsl_mc_device *mc_dev); |
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396 | 431 | |
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| 432 | +struct fsl_mc_device *fsl_mc_get_endpoint(struct fsl_mc_device *mc_dev); |
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| 433 | + |
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397 | 434 | extern struct bus_type fsl_mc_bus_type; |
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398 | 435 | |
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399 | 436 | extern struct device_type fsl_mc_bus_dprc_type; |
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.. | .. |
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405 | 442 | extern struct device_type fsl_mc_bus_dpmcp_type; |
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406 | 443 | extern struct device_type fsl_mc_bus_dpmac_type; |
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407 | 444 | extern struct device_type fsl_mc_bus_dprtc_type; |
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| 445 | +extern struct device_type fsl_mc_bus_dpseci_type; |
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| 446 | +extern struct device_type fsl_mc_bus_dpdmux_type; |
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| 447 | +extern struct device_type fsl_mc_bus_dpdcei_type; |
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| 448 | +extern struct device_type fsl_mc_bus_dpaiop_type; |
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| 449 | +extern struct device_type fsl_mc_bus_dpci_type; |
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| 450 | +extern struct device_type fsl_mc_bus_dpdmai_type; |
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408 | 451 | |
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409 | 452 | static inline bool is_fsl_mc_bus_dprc(const struct fsl_mc_device *mc_dev) |
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410 | 453 | { |
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.. | .. |
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424 | 467 | static inline bool is_fsl_mc_bus_dpsw(const struct fsl_mc_device *mc_dev) |
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425 | 468 | { |
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426 | 469 | return mc_dev->dev.type == &fsl_mc_bus_dpsw_type; |
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| 470 | +} |
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| 471 | + |
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| 472 | +static inline bool is_fsl_mc_bus_dpdmux(const struct fsl_mc_device *mc_dev) |
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| 473 | +{ |
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| 474 | + return mc_dev->dev.type == &fsl_mc_bus_dpdmux_type; |
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427 | 475 | } |
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428 | 476 | |
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429 | 477 | static inline bool is_fsl_mc_bus_dpbp(const struct fsl_mc_device *mc_dev) |
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.. | .. |
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451 | 499 | return mc_dev->dev.type == &fsl_mc_bus_dprtc_type; |
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452 | 500 | } |
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453 | 501 | |
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| 502 | +static inline bool is_fsl_mc_bus_dpseci(const struct fsl_mc_device *mc_dev) |
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| 503 | +{ |
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| 504 | + return mc_dev->dev.type == &fsl_mc_bus_dpseci_type; |
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| 505 | +} |
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| 506 | + |
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| 507 | +static inline bool is_fsl_mc_bus_dpdcei(const struct fsl_mc_device *mc_dev) |
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| 508 | +{ |
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| 509 | + return mc_dev->dev.type == &fsl_mc_bus_dpdcei_type; |
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| 510 | +} |
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| 511 | + |
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| 512 | +static inline bool is_fsl_mc_bus_dpaiop(const struct fsl_mc_device *mc_dev) |
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| 513 | +{ |
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| 514 | + return mc_dev->dev.type == &fsl_mc_bus_dpaiop_type; |
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| 515 | +} |
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| 516 | + |
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| 517 | +static inline bool is_fsl_mc_bus_dpci(const struct fsl_mc_device *mc_dev) |
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| 518 | +{ |
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| 519 | + return mc_dev->dev.type == &fsl_mc_bus_dpci_type; |
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| 520 | +} |
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| 521 | + |
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| 522 | +static inline bool is_fsl_mc_bus_dpdmai(const struct fsl_mc_device *mc_dev) |
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| 523 | +{ |
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| 524 | + return mc_dev->dev.type == &fsl_mc_bus_dpdmai_type; |
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| 525 | +} |
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| 526 | + |
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| 527 | +#define DPRC_RESET_OPTION_NON_RECURSIVE 0x00000001 |
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| 528 | +int dprc_reset_container(struct fsl_mc_io *mc_io, |
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| 529 | + u32 cmd_flags, |
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| 530 | + u16 token, |
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| 531 | + int child_container_id, |
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| 532 | + u32 options); |
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| 533 | + |
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| 534 | +int dprc_scan_container(struct fsl_mc_device *mc_bus_dev, |
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| 535 | + bool alloc_interrupts); |
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| 536 | + |
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| 537 | +void dprc_remove_devices(struct fsl_mc_device *mc_bus_dev, |
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| 538 | + struct fsl_mc_obj_desc *obj_desc_array, |
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| 539 | + int num_child_objects_in_mc); |
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| 540 | + |
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| 541 | +int dprc_cleanup(struct fsl_mc_device *mc_dev); |
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| 542 | + |
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| 543 | +int dprc_setup(struct fsl_mc_device *mc_dev); |
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| 544 | + |
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| 545 | +/** |
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| 546 | + * Maximum number of total IRQs that can be pre-allocated for an MC bus' |
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| 547 | + * IRQ pool |
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| 548 | + */ |
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| 549 | +#define FSL_MC_IRQ_POOL_MAX_TOTAL_IRQS 256 |
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| 550 | + |
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| 551 | +int fsl_mc_populate_irq_pool(struct fsl_mc_device *mc_bus_dev, |
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| 552 | + unsigned int irq_count); |
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| 553 | + |
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| 554 | +void fsl_mc_cleanup_irq_pool(struct fsl_mc_device *mc_bus_dev); |
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| 555 | + |
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454 | 556 | /* |
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455 | 557 | * Data Path Buffer Pool (DPBP) API |
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456 | 558 | * Contains initialization APIs and runtime control APIs for DPBP |
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