.. | .. |
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16 | 16 | #include <linux/acpi.h> |
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17 | 17 | #include <linux/io.h> |
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18 | 18 | #include <linux/delay.h> |
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| 19 | +#include <linux/pgtable.h> |
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19 | 20 | |
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20 | 21 | #include <linux/atomic.h> |
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21 | 22 | #include <asm/timer.h> |
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22 | 23 | #include <asm/hw_irq.h> |
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23 | | -#include <asm/pgtable.h> |
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24 | 24 | #include <asm/desc.h> |
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| 25 | +#include <asm/io_apic.h> |
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| 26 | +#include <asm/acpi.h> |
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25 | 27 | #include <asm/apic.h> |
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26 | 28 | #include <asm/setup.h> |
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27 | 29 | #include <asm/i8259.h> |
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.. | .. |
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43 | 45 | * |
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44 | 46 | * (these are usually mapped into the 0x30-0xff vector range) |
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45 | 47 | */ |
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46 | | - |
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47 | | -/* |
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48 | | - * IRQ2 is cascade interrupt to second interrupt controller |
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49 | | - */ |
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50 | | -static struct irqaction irq2 = { |
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51 | | - .handler = no_action, |
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52 | | - .name = "cascade", |
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53 | | - .flags = IRQF_NO_THREAD, |
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54 | | -}; |
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55 | 48 | |
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56 | 49 | DEFINE_PER_CPU(vector_irq_t, vector_irq) = { |
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57 | 50 | [0 ... NR_VECTORS - 1] = VECTOR_UNUSED, |
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.. | .. |
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84 | 77 | * On cpu 0, Assign ISA_IRQ_VECTOR(irq) to IRQ 0..15. |
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85 | 78 | * If these IRQ's are handled by legacy interrupt-controllers like PIC, |
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86 | 79 | * then this configuration will likely be static after the boot. If |
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87 | | - * these IRQ's are handled by more mordern controllers like IO-APIC, |
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| 80 | + * these IRQs are handled by more modern controllers like IO-APIC, |
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88 | 81 | * then this vector space can be freed and re-used dynamically as the |
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89 | 82 | * irq's migrate etc. |
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90 | 83 | */ |
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91 | 84 | for (i = 0; i < nr_legacy_irqs(); i++) |
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92 | 85 | per_cpu(vector_irq, 0)[ISA_IRQ_VECTOR(i)] = irq_to_desc(i); |
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| 86 | + |
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| 87 | + BUG_ON(irq_init_percpu_irqstack(smp_processor_id())); |
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93 | 88 | |
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94 | 89 | x86_init.irqs.intr_init(); |
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95 | 90 | } |
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.. | .. |
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102 | 97 | idt_setup_apic_and_irq_gates(); |
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103 | 98 | lapic_assign_system_vectors(); |
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104 | 99 | |
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105 | | - if (!acpi_ioapic && !of_ioapic && nr_legacy_irqs()) |
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106 | | - setup_irq(2, &irq2); |
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107 | | - |
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108 | | - irq_ctx_init(smp_processor_id()); |
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| 100 | + if (!acpi_ioapic && !of_ioapic && nr_legacy_irqs()) { |
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| 101 | + /* IRQ2 is cascade interrupt to second interrupt controller */ |
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| 102 | + if (request_irq(2, no_action, IRQF_NO_THREAD, "cascade", NULL)) |
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| 103 | + pr_err("%s: request_irq() failed\n", "cascade"); |
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| 104 | + } |
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109 | 105 | } |
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