| .. | .. |
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| 22 | 22 | stdout-path = "serial0:115200n8"; |
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| 23 | 23 | }; |
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| 24 | 24 | |
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| 25 | + hdmi-out { |
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| 26 | + compatible = "hdmi-connector"; |
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| 27 | + type = "a"; |
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| 28 | + |
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| 29 | + port { |
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| 30 | + hdmi_con: endpoint { |
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| 31 | + remote-endpoint = <&adv7511_out>; |
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| 32 | + }; |
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| 33 | + }; |
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| 34 | + }; |
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| 35 | + |
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| 36 | + lvds-decoder { |
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| 37 | + compatible = "thine,thc63lvd1024"; |
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| 38 | + vcc-supply = <&vcc3v3_d5>; |
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| 39 | + |
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| 40 | + ports { |
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| 41 | + #address-cells = <1>; |
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| 42 | + #size-cells = <0>; |
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| 43 | + |
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| 44 | + port@0 { |
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| 45 | + reg = <0>; |
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| 46 | + thc63lvd1024_in: endpoint { |
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| 47 | + remote-endpoint = <&lvds0_out>; |
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| 48 | + }; |
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| 49 | + }; |
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| 50 | + |
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| 51 | + port@2 { |
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| 52 | + reg = <2>; |
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| 53 | + thc63lvd1024_out: endpoint { |
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| 54 | + remote-endpoint = <&adv7511_in>; |
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| 55 | + }; |
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| 56 | + }; |
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| 57 | + }; |
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| 58 | + }; |
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| 59 | + |
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| 25 | 60 | memory@48000000 { |
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| 26 | 61 | device_type = "memory"; |
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| 27 | 62 | /* first 128MB is reserved for secure area. */ |
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| 28 | 63 | reg = <0 0x48000000 0 0x78000000>; |
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| 29 | 64 | }; |
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| 65 | + |
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| 66 | + osc1_clk: osc1-clock { |
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| 67 | + compatible = "fixed-clock"; |
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| 68 | + #clock-cells = <0>; |
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| 69 | + clock-frequency = <148500000>; |
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| 70 | + }; |
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| 71 | + |
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| 72 | + vcc1v8_d4: regulator-0 { |
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| 73 | + compatible = "regulator-fixed"; |
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| 74 | + regulator-name = "VCC1V8_D4"; |
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| 75 | + regulator-min-microvolt = <1800000>; |
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| 76 | + regulator-max-microvolt = <1800000>; |
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| 77 | + regulator-boot-on; |
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| 78 | + regulator-always-on; |
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| 79 | + }; |
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| 80 | + |
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| 81 | + vcc3v3_d5: regulator-1 { |
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| 82 | + compatible = "regulator-fixed"; |
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| 83 | + regulator-name = "VCC3V3_D5"; |
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| 84 | + regulator-min-microvolt = <3300000>; |
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| 85 | + regulator-max-microvolt = <3300000>; |
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| 86 | + regulator-boot-on; |
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| 87 | + regulator-always-on; |
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| 88 | + }; |
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| 89 | +}; |
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| 90 | + |
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| 91 | +&du { |
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| 92 | + clocks = <&cpg CPG_MOD 724>, |
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| 93 | + <&osc1_clk>; |
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| 94 | + clock-names = "du.0", "dclkin.0"; |
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| 95 | + status = "okay"; |
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| 30 | 96 | }; |
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| 31 | 97 | |
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| 32 | 98 | &extal_clk { |
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| .. | .. |
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| 53 | 119 | }; |
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| 54 | 120 | }; |
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| 55 | 121 | |
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| 122 | +&i2c0 { |
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| 123 | + pinctrl-0 = <&i2c0_pins>; |
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| 124 | + pinctrl-names = "default"; |
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| 125 | + |
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| 126 | + status = "okay"; |
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| 127 | + clock-frequency = <400000>; |
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| 128 | + |
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| 129 | + hdmi@39 { |
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| 130 | + compatible = "adi,adv7511w"; |
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| 131 | + #sound-dai-cells = <0>; |
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| 132 | + reg = <0x39>; |
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| 133 | + interrupt-parent = <&gpio1>; |
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| 134 | + interrupts = <20 IRQ_TYPE_LEVEL_LOW>; |
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| 135 | + avdd-supply = <&vcc1v8_d4>; |
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| 136 | + dvdd-supply = <&vcc1v8_d4>; |
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| 137 | + pvdd-supply = <&vcc1v8_d4>; |
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| 138 | + bgvdd-supply = <&vcc1v8_d4>; |
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| 139 | + dvdd-3v-supply = <&vcc3v3_d5>; |
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| 140 | + |
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| 141 | + adi,input-depth = <8>; |
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| 142 | + adi,input-colorspace = "rgb"; |
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| 143 | + adi,input-clock = "1x"; |
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| 144 | + |
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| 145 | + ports { |
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| 146 | + #address-cells = <1>; |
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| 147 | + #size-cells = <0>; |
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| 148 | + |
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| 149 | + port@0 { |
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| 150 | + reg = <0>; |
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| 151 | + adv7511_in: endpoint { |
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| 152 | + remote-endpoint = <&thc63lvd1024_out>; |
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| 153 | + }; |
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| 154 | + }; |
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| 155 | + |
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| 156 | + port@1 { |
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| 157 | + reg = <1>; |
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| 158 | + adv7511_out: endpoint { |
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| 159 | + remote-endpoint = <&hdmi_con>; |
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| 160 | + }; |
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| 161 | + }; |
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| 162 | + }; |
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| 163 | + }; |
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| 164 | +}; |
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| 165 | + |
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| 166 | +&lvds0 { |
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| 167 | + status = "okay"; |
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| 168 | + |
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| 169 | + ports { |
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| 170 | + port@1 { |
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| 171 | + lvds0_out: endpoint { |
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| 172 | + remote-endpoint = <&thc63lvd1024_in>; |
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| 173 | + }; |
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| 174 | + }; |
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| 175 | + }; |
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| 176 | +}; |
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| 177 | + |
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| 56 | 178 | &pfc { |
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| 57 | 179 | gether_pins: gether { |
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| 58 | 180 | groups = "gether_mdio_a", "gether_rgmii", |
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| 59 | 181 | "gether_txcrefclk", "gether_txcrefclk_mega"; |
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| 60 | 182 | function = "gether"; |
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| 183 | + }; |
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| 184 | + |
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| 185 | + i2c0_pins: i2c0 { |
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| 186 | + groups = "i2c0"; |
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| 187 | + function = "i2c0"; |
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| 188 | + }; |
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| 189 | + |
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| 190 | + qspi0_pins: qspi0 { |
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| 191 | + groups = "qspi0_ctrl", "qspi0_data4"; |
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| 192 | + function = "qspi0"; |
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| 61 | 193 | }; |
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| 62 | 194 | |
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| 63 | 195 | scif0_pins: scif0 { |
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| .. | .. |
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| 71 | 203 | }; |
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| 72 | 204 | }; |
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| 73 | 205 | |
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| 206 | +&rpc { |
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| 207 | + pinctrl-0 = <&qspi0_pins>; |
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| 208 | + pinctrl-names = "default"; |
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| 209 | + |
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| 210 | + status = "okay"; |
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| 211 | + |
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| 212 | + flash@0 { |
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| 213 | + compatible = "spansion,s25fs512s", "jedec,spi-nor"; |
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| 214 | + reg = <0>; |
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| 215 | + spi-max-frequency = <50000000>; |
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| 216 | + spi-rx-bus-width = <4>; |
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| 217 | + |
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| 218 | + partitions { |
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| 219 | + compatible = "fixed-partitions"; |
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| 220 | + #address-cells = <1>; |
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| 221 | + #size-cells = <1>; |
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| 222 | + |
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| 223 | + bootparam@0 { |
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| 224 | + reg = <0x00000000 0x040000>; |
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| 225 | + read-only; |
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| 226 | + }; |
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| 227 | + cr7@40000 { |
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| 228 | + reg = <0x00040000 0x080000>; |
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| 229 | + read-only; |
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| 230 | + }; |
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| 231 | + cert_header_sa3@c0000 { |
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| 232 | + reg = <0x000c0000 0x080000>; |
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| 233 | + read-only; |
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| 234 | + }; |
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| 235 | + bl2@140000 { |
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| 236 | + reg = <0x00140000 0x040000>; |
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| 237 | + read-only; |
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| 238 | + }; |
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| 239 | + cert_header_sa6@180000 { |
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| 240 | + reg = <0x00180000 0x040000>; |
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| 241 | + read-only; |
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| 242 | + }; |
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| 243 | + bl31@1c0000 { |
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| 244 | + reg = <0x001c0000 0x460000>; |
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| 245 | + read-only; |
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| 246 | + }; |
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| 247 | + uboot@640000 { |
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| 248 | + reg = <0x00640000 0x0c0000>; |
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| 249 | + read-only; |
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| 250 | + }; |
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| 251 | + uboot-env@700000 { |
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| 252 | + reg = <0x00700000 0x040000>; |
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| 253 | + read-only; |
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| 254 | + }; |
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| 255 | + dtb@740000 { |
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| 256 | + reg = <0x00740000 0x080000>; |
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| 257 | + }; |
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| 258 | + kernel@7c0000 { |
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| 259 | + reg = <0x007c0000 0x1400000>; |
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| 260 | + }; |
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| 261 | + user@1bc0000 { |
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| 262 | + reg = <0x01bc0000 0x2440000>; |
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| 263 | + }; |
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| 264 | + }; |
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| 265 | + }; |
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| 266 | +}; |
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| 267 | + |
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| 268 | +&rwdt { |
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| 269 | + timeout-sec = <60>; |
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| 270 | + status = "okay"; |
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| 271 | +}; |
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| 272 | + |
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| 74 | 273 | &scif0 { |
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| 75 | 274 | pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>; |
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| 76 | 275 | pinctrl-names = "default"; |
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