hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d
kernel/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
....@@ -1,6 +1,6 @@
11 // SPDX-License-Identifier: GPL-2.0
22 /*
3
- * SAMSUNG Exynos5433 TM2 board device tree source
3
+ * Samsung Exynos5433 TM2 board device tree source
44 *
55 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
66 *
....@@ -33,7 +33,8 @@
3333 <&cmu_disp CLK_MOUT_DISP_PLL>,
3434 <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
3535 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
36
- <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>;
36
+ <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>,
37
+ <&cmu_disp CLK_MOUT_SCLK_DSD_USER>;
3738 assigned-clock-parents = <0>, <0>,
3839 <&cmu_mif CLK_ACLK_DISP_333>,
3940 <&cmu_mif CLK_SCLK_DSIM0_DISP>,
....@@ -45,7 +46,8 @@
4546 <&cmu_disp CLK_FOUT_DISP_PLL>,
4647 <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
4748 <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
48
- <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>;
49
+ <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
50
+ <&cmu_mif CLK_SCLK_DSD_DISP>;
4951 assigned-clock-rates = <250000000>, <400000000>;
5052 };
5153