.. | .. |
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107 | 107 | } |
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108 | 108 | } |
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109 | 109 | |
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| 110 | +bool rga_is_yuv420_planar_format(uint32_t format) |
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| 111 | +{ |
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| 112 | + switch (format) { |
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| 113 | + case RGA_FORMAT_YCbCr_420_P: |
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| 114 | + case RGA_FORMAT_YCrCb_420_P: |
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| 115 | + return true; |
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| 116 | + default: |
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| 117 | + return false; |
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| 118 | + } |
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| 119 | +} |
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| 120 | + |
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| 121 | +bool rga_is_yuv420_semi_planar_format(uint32_t format) |
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| 122 | +{ |
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| 123 | + switch (format) { |
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| 124 | + case RGA_FORMAT_YCbCr_420_SP: |
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| 125 | + case RGA_FORMAT_YCrCb_420_SP: |
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| 126 | + case RGA_FORMAT_YCbCr_420_SP_10B: |
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| 127 | + case RGA_FORMAT_YCrCb_420_SP_10B: |
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| 128 | + return true; |
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| 129 | + default: |
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| 130 | + return false; |
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| 131 | + } |
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| 132 | +} |
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| 133 | + |
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110 | 134 | bool rga_is_yuv422_packed_format(uint32_t format) |
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111 | 135 | { |
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112 | 136 | switch (format) { |
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.. | .. |
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114 | 138 | case RGA_FORMAT_VYUY_422: |
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115 | 139 | case RGA_FORMAT_YUYV_422: |
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116 | 140 | case RGA_FORMAT_UYVY_422: |
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| 141 | + return true; |
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| 142 | + default: |
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| 143 | + return false; |
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| 144 | + } |
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| 145 | +} |
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| 146 | + |
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| 147 | +bool rga_is_yuv422_planar_format(uint32_t format) |
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| 148 | +{ |
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| 149 | + switch (format) { |
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| 150 | + case RGA_FORMAT_YCbCr_422_P: |
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| 151 | + case RGA_FORMAT_YCrCb_422_P: |
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| 152 | + return true; |
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| 153 | + default: |
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| 154 | + return false; |
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| 155 | + } |
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| 156 | +} |
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| 157 | + |
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| 158 | +bool rga_is_yuv422_semi_planar_format(uint32_t format) |
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| 159 | +{ |
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| 160 | + switch (format) { |
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| 161 | + case RGA_FORMAT_YCbCr_422_SP: |
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| 162 | + case RGA_FORMAT_YCrCb_422_SP: |
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| 163 | + case RGA_FORMAT_YCbCr_422_SP_10B: |
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| 164 | + case RGA_FORMAT_YCrCb_422_SP_10B: |
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117 | 165 | return true; |
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118 | 166 | default: |
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119 | 167 | return false; |
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.. | .. |
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481 | 529 | } |
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482 | 530 | } |
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483 | 531 | |
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484 | | -const char *rga_get_blend_mode_str(uint16_t alpha_rop_flag, |
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485 | | - uint16_t alpha_mode_0, |
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486 | | - uint16_t alpha_mode_1) |
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| 532 | +const char *rga_get_blend_mode_str(enum rga_alpha_blend_mode mode) |
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487 | 533 | { |
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488 | | - if (alpha_rop_flag == 0) { |
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| 534 | + switch (mode) { |
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| 535 | + case RGA_ALPHA_NONE: |
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489 | 536 | return "no blend"; |
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490 | | - } else if (alpha_rop_flag == 0x9) { |
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491 | | - if (alpha_mode_0 == 0x381A && alpha_mode_1 == 0x381A) |
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492 | | - return "105 src + (1-src.a)*dst"; |
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493 | | - else if (alpha_mode_0 == 0x483A && alpha_mode_1 == 0x483A) |
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494 | | - return "405 src.a * src + (1-src.a) * dst"; |
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495 | | - else |
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496 | | - return "check reg for more imformation"; |
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497 | | - } else { |
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| 537 | + |
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| 538 | + case RGA_ALPHA_BLEND_SRC: |
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| 539 | + return "src"; |
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| 540 | + |
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| 541 | + case RGA_ALPHA_BLEND_DST: |
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| 542 | + return "dst"; |
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| 543 | + |
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| 544 | + case RGA_ALPHA_BLEND_SRC_OVER: |
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| 545 | + return "src-over"; |
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| 546 | + |
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| 547 | + case RGA_ALPHA_BLEND_DST_OVER: |
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| 548 | + return "dst-over"; |
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| 549 | + |
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| 550 | + case RGA_ALPHA_BLEND_SRC_IN: |
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| 551 | + return "src-in"; |
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| 552 | + |
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| 553 | + case RGA_ALPHA_BLEND_DST_IN: |
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| 554 | + return "dst-in"; |
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| 555 | + |
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| 556 | + case RGA_ALPHA_BLEND_SRC_OUT: |
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| 557 | + return "src-out"; |
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| 558 | + |
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| 559 | + case RGA_ALPHA_BLEND_DST_OUT: |
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| 560 | + return "dst-out"; |
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| 561 | + |
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| 562 | + case RGA_ALPHA_BLEND_SRC_ATOP: |
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| 563 | + return "src-atop"; |
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| 564 | + |
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| 565 | + case RGA_ALPHA_BLEND_DST_ATOP: |
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| 566 | + return "dst-atop"; |
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| 567 | + |
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| 568 | + case RGA_ALPHA_BLEND_XOR: |
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| 569 | + return "xor"; |
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| 570 | + |
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| 571 | + case RGA_ALPHA_BLEND_CLEAR: |
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| 572 | + return "clear"; |
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| 573 | + |
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| 574 | + default: |
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498 | 575 | return "check reg for more imformation"; |
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499 | 576 | } |
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500 | 577 | } |
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.. | .. |
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524 | 601 | return "RK_IOMMU"; |
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525 | 602 | default: |
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526 | 603 | return "NONE_MMU"; |
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| 604 | + } |
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| 605 | +} |
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| 606 | + |
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| 607 | +const char *rga_get_core_name(enum RGA_SCHEDULER_CORE core) |
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| 608 | +{ |
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| 609 | + switch (core) { |
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| 610 | + case RGA_SCHEDULER_RGA3_CORE0: |
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| 611 | + return "RGA3_core0"; |
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| 612 | + case RGA_SCHEDULER_RGA3_CORE1: |
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| 613 | + return "RGA3_core1"; |
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| 614 | + case RGA_SCHEDULER_RGA2_CORE0: |
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| 615 | + return "RGA2_core0"; |
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| 616 | + default: |
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| 617 | + return "unknown_core"; |
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527 | 618 | } |
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528 | 619 | } |
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529 | 620 | |
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.. | .. |
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665 | 756 | |
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666 | 757 | return (yrgb + uv + v); |
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667 | 758 | } |
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| 759 | + |
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| 760 | +void rga_dump_memory_parm(struct rga_memory_parm *parm) |
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| 761 | +{ |
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| 762 | + pr_info("memory param: w = %d, h = %d, f = %s(0x%x), size = %d\n", |
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| 763 | + parm->width, parm->height, rga_get_format_name(parm->format), |
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| 764 | + parm->format, parm->size); |
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| 765 | +} |
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| 766 | + |
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| 767 | +void rga_dump_external_buffer(struct rga_external_buffer *buffer) |
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| 768 | +{ |
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| 769 | + pr_info("external: memory = 0x%lx, type = %s\n", |
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| 770 | + (unsigned long)buffer->memory, rga_get_memory_type_str(buffer->type)); |
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| 771 | + rga_dump_memory_parm(&buffer->memory_parm); |
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| 772 | +} |
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