forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/video/rockchip/rga3/include/rga_drv.h
....@@ -16,6 +16,7 @@
1616 #include <linux/dma-mapping.h>
1717 #include <linux/err.h>
1818 #include <linux/fb.h>
19
+#include <linux/fdtable.h>
1920 #include <linux/fs.h>
2021 #include <linux/init.h>
2122 #include <linux/interrupt.h>
....@@ -48,7 +49,6 @@
4849
4950 #include <linux/iommu.h>
5051 #include <linux/iova.h>
51
-#include <linux/dma-iommu.h>
5252 #include <linux/pagemap.h>
5353
5454 #ifdef CONFIG_DMABUF_CACHE
....@@ -86,8 +86,8 @@
8686 #define STR(x) STR_HELPER(x)
8787
8888 #define DRIVER_MAJOR_VERISON 1
89
-#define DRIVER_MINOR_VERSION 2
90
-#define DRIVER_REVISION_VERSION 20
89
+#define DRIVER_MINOR_VERSION 3
90
+#define DRIVER_REVISION_VERSION 1
9191 #define DRIVER_PATCH_VERSION
9292
9393 #define DRIVER_VERSION (STR(DRIVER_MAJOR_VERISON) "." STR(DRIVER_MINOR_VERSION) \
....@@ -97,7 +97,7 @@
9797 #define RGA_JOB_TIMEOUT_DELAY HZ
9898 #define RGA_RESET_TIMEOUT 1000
9999
100
-#define RGA_MAX_SCHEDULER 3
100
+#define RGA_MAX_SCHEDULER RGA_HW_SIZE
101101 #define RGA_MAX_BUS_CLK 10
102102
103103 #define RGA_BUFFER_POOL_MAX_SIZE 64
....@@ -135,6 +135,17 @@
135135 RGA_SCHEDULER_IDLE = 0,
136136 RGA_SCHEDULER_WORKING,
137137 RGA_SCHEDULER_ABORT,
138
+};
139
+
140
+enum rga_job_state {
141
+ RGA_JOB_STATE_PENDING = 0,
142
+ RGA_JOB_STATE_PREPARE,
143
+ RGA_JOB_STATE_RUNNING,
144
+ RGA_JOB_STATE_FINISH,
145
+ RGA_JOB_STATE_DONE,
146
+ RGA_JOB_STATE_INTR_ERR,
147
+ RGA_JOB_STATE_HW_TIMEOUT,
148
+ RGA_JOB_STATE_ABORT,
138149 };
139150
140151 struct rga_iommu_dma_cookie {
....@@ -261,6 +272,7 @@
261272 struct rga_req rga_command_base;
262273 uint32_t cmd_reg[32 * 8];
263274 struct rga_full_csc full_csc;
275
+ struct rga_csc_clip full_csc_clip;
264276 struct rga_pre_intr_info pre_intr_info;
265277
266278 struct rga_job_buffer src_buffer;
....@@ -285,6 +297,12 @@
285297 int ret;
286298 pid_t pid;
287299 bool use_batch_mode;
300
+
301
+ struct kref refcount;
302
+ unsigned long state;
303
+ uint32_t intr_status;
304
+ uint32_t hw_status;
305
+ uint32_t cmd_status;
288306 };
289307
290308 struct rga_backend_ops {
....@@ -292,6 +310,9 @@
292310 int (*set_reg)(struct rga_job *job, struct rga_scheduler_t *scheduler);
293311 int (*init_reg)(struct rga_job *job);
294312 void (*soft_reset)(struct rga_scheduler_t *scheduler);
313
+ int (*read_back_reg)(struct rga_job *job, struct rga_scheduler_t *scheduler);
314
+ int (*irq)(struct rga_scheduler_t *scheduler);
315
+ int (*isr_thread)(struct rga_job *job, struct rga_scheduler_t *scheduler);
295316 };
296317
297318 struct rga_timer {
....@@ -359,6 +380,7 @@
359380 */
360381 struct mm_struct *current_mm;
361382
383
+ struct rga_feature feature;
362384 /* TODO: add some common work */
363385 };
364386
....@@ -421,8 +443,6 @@
421443 struct rga_match_data_t {
422444 const char * const *clks;
423445 int num_clks;
424
- const struct rga_irqs_data_t *irqs;
425
- int num_irqs;
426446 };
427447
428448 static inline int rga_read(int offset, struct rga_scheduler_t *scheduler)