forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/video/rockchip/mpp/hack/mpp_hack_px30.c
....@@ -19,6 +19,7 @@
1919 #include "../mpp_common.h"
2020 #include "../mpp_iommu.h"
2121 #include "mpp_hack_px30.h"
22
+#include <soc/rockchip/rockchip_iommu.h>
2223
2324 #define RK_MMU_DTE_ADDR 0x00 /* Directory table address */
2425 #define RK_MMU_STATUS 0x04
....@@ -177,7 +178,17 @@
177178 iommu->grf_val = mpp->grf_info->val & MPP_GRF_VAL_MASK;
178179 if (mpp->hw_ops->clk_on)
179180 mpp->hw_ops->clk_on(mpp);
180
- iommu->dte_addr = mpp_iommu_get_dte_addr(iommu);
181
+ /*
182
+ * ensure that iommu is enable, so that read valid dte value
183
+ */
184
+ if (rockchip_iommu_is_enabled(mpp->dev))
185
+ iommu->dte_addr = mpp_iommu_get_dte_addr(iommu);
186
+ else {
187
+ rockchip_iommu_enable(mpp->dev);
188
+ iommu->dte_addr = mpp_iommu_get_dte_addr(iommu);
189
+ rockchip_iommu_disable(mpp->dev);
190
+ }
191
+ dev_err(mpp->dev, "%s dte_addr %08x\n", __func__, iommu->dte_addr);
181192 if (mpp->hw_ops->clk_off)
182193 mpp->hw_ops->clk_off(mpp);
183194 INIT_LIST_HEAD(&iommu->link);