.. | .. |
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2 | 2 | /** |
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3 | 3 | * debugfs.c - DesignWare USB3 DRD Controller DebugFS file |
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4 | 4 | * |
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5 | | - * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com |
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| 5 | + * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com |
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6 | 6 | * |
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7 | 7 | * Authors: Felipe Balbi <balbi@ti.com>, |
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8 | 8 | * Sebastian Andrzej Siewior <bigeasy@linutronix.de> |
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.. | .. |
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327 | 327 | unsigned int current_mode; |
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328 | 328 | unsigned long flags; |
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329 | 329 | u32 reg; |
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| 330 | + int ret; |
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| 331 | + |
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| 332 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 333 | + if (ret < 0) |
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| 334 | + return ret; |
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330 | 335 | |
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331 | 336 | spin_lock_irqsave(&dwc->lock, flags); |
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332 | 337 | reg = dwc3_readl(dwc->regs, DWC3_GSTS); |
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.. | .. |
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344 | 349 | break; |
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345 | 350 | } |
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346 | 351 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 352 | + |
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| 353 | + pm_runtime_put_sync(dwc->dev); |
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347 | 354 | |
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348 | 355 | return 0; |
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349 | 356 | } |
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.. | .. |
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390 | 397 | struct dwc3 *dwc = s->private; |
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391 | 398 | unsigned long flags; |
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392 | 399 | u32 reg; |
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| 400 | + int ret; |
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| 401 | + |
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| 402 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 403 | + if (ret < 0) |
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| 404 | + return ret; |
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393 | 405 | |
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394 | 406 | spin_lock_irqsave(&dwc->lock, flags); |
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395 | 407 | reg = dwc3_readl(dwc->regs, DWC3_GCTL); |
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.. | .. |
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397 | 409 | |
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398 | 410 | switch (DWC3_GCTL_PRTCAP(reg)) { |
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399 | 411 | case DWC3_GCTL_PRTCAP_HOST: |
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400 | | - seq_printf(s, "host\n"); |
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| 412 | + seq_puts(s, "host\n"); |
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401 | 413 | break; |
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402 | 414 | case DWC3_GCTL_PRTCAP_DEVICE: |
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403 | | - seq_printf(s, "device\n"); |
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| 415 | + seq_puts(s, "device\n"); |
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404 | 416 | break; |
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405 | 417 | case DWC3_GCTL_PRTCAP_OTG: |
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406 | | - seq_printf(s, "otg\n"); |
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| 418 | + seq_puts(s, "otg\n"); |
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407 | 419 | break; |
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408 | 420 | default: |
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409 | 421 | seq_printf(s, "UNKNOWN %08x\n", DWC3_GCTL_PRTCAP(reg)); |
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410 | 422 | } |
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| 423 | + |
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| 424 | + pm_runtime_put_sync(dwc->dev); |
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411 | 425 | |
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412 | 426 | return 0; |
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413 | 427 | } |
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.. | .. |
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428 | 442 | if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) |
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429 | 443 | return -EFAULT; |
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430 | 444 | |
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| 445 | + if (dwc->dr_mode != USB_DR_MODE_OTG) |
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| 446 | + return count; |
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| 447 | + |
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431 | 448 | if (!strncmp(buf, "host", 4)) |
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432 | 449 | mode = DWC3_GCTL_PRTCAP_HOST; |
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433 | 450 | |
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.. | .. |
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436 | 453 | |
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437 | 454 | if (!strncmp(buf, "otg", 3)) |
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438 | 455 | mode = DWC3_GCTL_PRTCAP_OTG; |
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| 456 | + |
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| 457 | +#if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI) |
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| 458 | + dwc->desired_role_sw_mode = mode; |
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| 459 | +#endif |
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439 | 460 | |
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440 | 461 | dwc3_set_mode(dwc, mode); |
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441 | 462 | |
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.. | .. |
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455 | 476 | struct dwc3 *dwc = s->private; |
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456 | 477 | unsigned long flags; |
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457 | 478 | u32 reg; |
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| 479 | + int ret; |
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| 480 | + |
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| 481 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 482 | + if (ret < 0) |
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| 483 | + return ret; |
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458 | 484 | |
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459 | 485 | spin_lock_irqsave(&dwc->lock, flags); |
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460 | 486 | reg = dwc3_readl(dwc->regs, DWC3_DCTL); |
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.. | .. |
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464 | 490 | |
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465 | 491 | switch (reg) { |
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466 | 492 | case 0: |
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467 | | - seq_printf(s, "no test\n"); |
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| 493 | + seq_puts(s, "no test\n"); |
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468 | 494 | break; |
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469 | | - case TEST_J: |
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470 | | - seq_printf(s, "test_j\n"); |
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| 495 | + case USB_TEST_J: |
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| 496 | + seq_puts(s, "test_j\n"); |
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471 | 497 | break; |
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472 | | - case TEST_K: |
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473 | | - seq_printf(s, "test_k\n"); |
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| 498 | + case USB_TEST_K: |
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| 499 | + seq_puts(s, "test_k\n"); |
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474 | 500 | break; |
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475 | | - case TEST_SE0_NAK: |
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476 | | - seq_printf(s, "test_se0_nak\n"); |
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| 501 | + case USB_TEST_SE0_NAK: |
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| 502 | + seq_puts(s, "test_se0_nak\n"); |
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477 | 503 | break; |
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478 | | - case TEST_PACKET: |
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479 | | - seq_printf(s, "test_packet\n"); |
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| 504 | + case USB_TEST_PACKET: |
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| 505 | + seq_puts(s, "test_packet\n"); |
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480 | 506 | break; |
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481 | | - case TEST_FORCE_EN: |
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482 | | - seq_printf(s, "test_force_enable\n"); |
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| 507 | + case USB_TEST_FORCE_ENABLE: |
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| 508 | + seq_puts(s, "test_force_enable\n"); |
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483 | 509 | break; |
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484 | 510 | default: |
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485 | 511 | seq_printf(s, "UNKNOWN %d\n", reg); |
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486 | 512 | } |
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| 513 | + |
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| 514 | + pm_runtime_put_sync(dwc->dev); |
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487 | 515 | |
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488 | 516 | return 0; |
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489 | 517 | } |
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.. | .. |
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501 | 529 | unsigned long flags; |
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502 | 530 | u32 testmode = 0; |
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503 | 531 | char buf[32]; |
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| 532 | + int ret; |
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504 | 533 | |
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505 | 534 | if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) |
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506 | 535 | return -EFAULT; |
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507 | 536 | |
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508 | 537 | if (!strncmp(buf, "test_j", 6)) |
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509 | | - testmode = TEST_J; |
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| 538 | + testmode = USB_TEST_J; |
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510 | 539 | else if (!strncmp(buf, "test_k", 6)) |
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511 | | - testmode = TEST_K; |
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| 540 | + testmode = USB_TEST_K; |
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512 | 541 | else if (!strncmp(buf, "test_se0_nak", 12)) |
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513 | | - testmode = TEST_SE0_NAK; |
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| 542 | + testmode = USB_TEST_SE0_NAK; |
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514 | 543 | else if (!strncmp(buf, "test_packet", 11)) |
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515 | | - testmode = TEST_PACKET; |
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| 544 | + testmode = USB_TEST_PACKET; |
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516 | 545 | else if (!strncmp(buf, "test_force_enable", 17)) |
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517 | | - testmode = TEST_FORCE_EN; |
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| 546 | + testmode = USB_TEST_FORCE_ENABLE; |
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518 | 547 | else |
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519 | 548 | testmode = 0; |
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| 549 | + |
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| 550 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 551 | + if (ret < 0) |
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| 552 | + return ret; |
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520 | 553 | |
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521 | 554 | spin_lock_irqsave(&dwc->lock, flags); |
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522 | 555 | dwc3_gadget_set_test_mode(dwc, testmode); |
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523 | 556 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 557 | + |
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| 558 | + pm_runtime_put_sync(dwc->dev); |
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524 | 559 | |
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525 | 560 | return count; |
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526 | 561 | } |
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.. | .. |
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540 | 575 | enum dwc3_link_state state; |
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541 | 576 | u32 reg; |
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542 | 577 | u8 speed; |
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| 578 | + int ret; |
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| 579 | + |
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| 580 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 581 | + if (ret < 0) |
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| 582 | + return ret; |
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543 | 583 | |
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544 | 584 | spin_lock_irqsave(&dwc->lock, flags); |
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545 | 585 | reg = dwc3_readl(dwc->regs, DWC3_GSTS); |
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546 | 586 | if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) { |
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547 | 587 | seq_puts(s, "Not available\n"); |
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548 | 588 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 589 | + pm_runtime_put_sync(dwc->dev); |
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549 | 590 | return 0; |
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550 | 591 | } |
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551 | 592 | |
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.. | .. |
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557 | 598 | dwc3_gadget_link_string(state) : |
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558 | 599 | dwc3_gadget_hs_link_string(state)); |
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559 | 600 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 601 | + |
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| 602 | + pm_runtime_put_sync(dwc->dev); |
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560 | 603 | |
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561 | 604 | return 0; |
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562 | 605 | } |
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.. | .. |
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576 | 619 | char buf[32]; |
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577 | 620 | u32 reg; |
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578 | 621 | u8 speed; |
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| 622 | + int ret; |
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579 | 623 | |
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580 | 624 | if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) |
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581 | 625 | return -EFAULT; |
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.. | .. |
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595 | 639 | else |
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596 | 640 | return -EINVAL; |
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597 | 641 | |
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| 642 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 643 | + if (ret < 0) |
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| 644 | + return ret; |
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| 645 | + |
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598 | 646 | spin_lock_irqsave(&dwc->lock, flags); |
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599 | 647 | reg = dwc3_readl(dwc->regs, DWC3_GSTS); |
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600 | 648 | if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) { |
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601 | 649 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 650 | + pm_runtime_put_sync(dwc->dev); |
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602 | 651 | return -EINVAL; |
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603 | 652 | } |
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604 | 653 | |
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.. | .. |
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608 | 657 | if (speed < DWC3_DSTS_SUPERSPEED && |
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609 | 658 | state != DWC3_LINK_STATE_RECOV) { |
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610 | 659 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 660 | + pm_runtime_put_sync(dwc->dev); |
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611 | 661 | return -EINVAL; |
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612 | 662 | } |
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613 | 663 | |
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614 | 664 | dwc3_gadget_set_link_state(dwc, state); |
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615 | 665 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 666 | + |
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| 667 | + pm_runtime_put_sync(dwc->dev); |
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616 | 668 | |
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617 | 669 | return count; |
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618 | 670 | } |
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.. | .. |
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635 | 687 | struct dwc3_ep *dep = s->private; |
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636 | 688 | struct dwc3 *dwc = dep->dwc; |
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637 | 689 | unsigned long flags; |
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| 690 | + u32 mdwidth; |
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638 | 691 | u32 val; |
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| 692 | + int ret; |
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| 693 | + |
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| 694 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 695 | + if (ret < 0) |
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| 696 | + return ret; |
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639 | 697 | |
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640 | 698 | spin_lock_irqsave(&dwc->lock, flags); |
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641 | 699 | val = dwc3_core_fifo_space(dep, DWC3_TXFIFO); |
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642 | 700 | |
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643 | 701 | /* Convert to bytes */ |
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644 | | - val *= DWC3_MDWIDTH(dwc->hwparams.hwparams0); |
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| 702 | + mdwidth = dwc3_mdwidth(dwc); |
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| 703 | + |
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| 704 | + val *= mdwidth; |
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645 | 705 | val >>= 3; |
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646 | 706 | seq_printf(s, "%u\n", val); |
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647 | 707 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 708 | + |
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| 709 | + pm_runtime_put_sync(dwc->dev); |
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648 | 710 | |
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649 | 711 | return 0; |
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650 | 712 | } |
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.. | .. |
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654 | 716 | struct dwc3_ep *dep = s->private; |
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655 | 717 | struct dwc3 *dwc = dep->dwc; |
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656 | 718 | unsigned long flags; |
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| 719 | + u32 mdwidth; |
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657 | 720 | u32 val; |
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| 721 | + int ret; |
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| 722 | + |
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| 723 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 724 | + if (ret < 0) |
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| 725 | + return ret; |
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658 | 726 | |
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659 | 727 | spin_lock_irqsave(&dwc->lock, flags); |
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660 | 728 | val = dwc3_core_fifo_space(dep, DWC3_RXFIFO); |
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661 | 729 | |
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662 | 730 | /* Convert to bytes */ |
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663 | | - val *= DWC3_MDWIDTH(dwc->hwparams.hwparams0); |
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| 731 | + mdwidth = dwc3_mdwidth(dwc); |
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| 732 | + |
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| 733 | + val *= mdwidth; |
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664 | 734 | val >>= 3; |
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665 | 735 | seq_printf(s, "%u\n", val); |
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666 | 736 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 737 | + |
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| 738 | + pm_runtime_put_sync(dwc->dev); |
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667 | 739 | |
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668 | 740 | return 0; |
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669 | 741 | } |
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.. | .. |
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674 | 746 | struct dwc3 *dwc = dep->dwc; |
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675 | 747 | unsigned long flags; |
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676 | 748 | u32 val; |
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| 749 | + int ret; |
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| 750 | + |
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| 751 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 752 | + if (ret < 0) |
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| 753 | + return ret; |
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677 | 754 | |
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678 | 755 | spin_lock_irqsave(&dwc->lock, flags); |
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679 | 756 | val = dwc3_core_fifo_space(dep, DWC3_TXREQQ); |
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680 | 757 | seq_printf(s, "%u\n", val); |
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681 | 758 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 759 | + |
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| 760 | + pm_runtime_put_sync(dwc->dev); |
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682 | 761 | |
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683 | 762 | return 0; |
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684 | 763 | } |
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.. | .. |
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689 | 768 | struct dwc3 *dwc = dep->dwc; |
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690 | 769 | unsigned long flags; |
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691 | 770 | u32 val; |
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| 771 | + int ret; |
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| 772 | + |
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| 773 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 774 | + if (ret < 0) |
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| 775 | + return ret; |
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692 | 776 | |
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693 | 777 | spin_lock_irqsave(&dwc->lock, flags); |
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694 | 778 | val = dwc3_core_fifo_space(dep, DWC3_RXREQQ); |
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695 | 779 | seq_printf(s, "%u\n", val); |
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696 | 780 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 781 | + |
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| 782 | + pm_runtime_put_sync(dwc->dev); |
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697 | 783 | |
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698 | 784 | return 0; |
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699 | 785 | } |
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.. | .. |
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704 | 790 | struct dwc3 *dwc = dep->dwc; |
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705 | 791 | unsigned long flags; |
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706 | 792 | u32 val; |
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| 793 | + int ret; |
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| 794 | + |
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| 795 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 796 | + if (ret < 0) |
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| 797 | + return ret; |
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707 | 798 | |
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708 | 799 | spin_lock_irqsave(&dwc->lock, flags); |
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709 | 800 | val = dwc3_core_fifo_space(dep, DWC3_RXINFOQ); |
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710 | 801 | seq_printf(s, "%u\n", val); |
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711 | 802 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 803 | + |
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| 804 | + pm_runtime_put_sync(dwc->dev); |
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712 | 805 | |
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713 | 806 | return 0; |
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714 | 807 | } |
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.. | .. |
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719 | 812 | struct dwc3 *dwc = dep->dwc; |
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720 | 813 | unsigned long flags; |
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721 | 814 | u32 val; |
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| 815 | + int ret; |
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| 816 | + |
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| 817 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 818 | + if (ret < 0) |
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| 819 | + return ret; |
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722 | 820 | |
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723 | 821 | spin_lock_irqsave(&dwc->lock, flags); |
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724 | 822 | val = dwc3_core_fifo_space(dep, DWC3_DESCFETCHQ); |
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725 | 823 | seq_printf(s, "%u\n", val); |
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726 | 824 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 825 | + |
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| 826 | + pm_runtime_put_sync(dwc->dev); |
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727 | 827 | |
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728 | 828 | return 0; |
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729 | 829 | } |
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.. | .. |
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734 | 834 | struct dwc3 *dwc = dep->dwc; |
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735 | 835 | unsigned long flags; |
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736 | 836 | u32 val; |
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| 837 | + int ret; |
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| 838 | + |
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| 839 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 840 | + if (ret < 0) |
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| 841 | + return ret; |
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737 | 842 | |
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738 | 843 | spin_lock_irqsave(&dwc->lock, flags); |
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739 | 844 | val = dwc3_core_fifo_space(dep, DWC3_EVENTQ); |
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740 | 845 | seq_printf(s, "%u\n", val); |
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741 | 846 | spin_unlock_irqrestore(&dwc->lock, flags); |
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| 847 | + |
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| 848 | + pm_runtime_put_sync(dwc->dev); |
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742 | 849 | |
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743 | 850 | return 0; |
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744 | 851 | } |
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.. | .. |
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750 | 857 | unsigned long flags; |
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751 | 858 | |
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752 | 859 | spin_lock_irqsave(&dwc->lock, flags); |
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753 | | - if (!(dep->flags & DWC3_EP_ENABLED) || |
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754 | | - !dep->endpoint.desc) { |
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755 | | - seq_printf(s, "--\n"); |
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| 860 | + if (!(dep->flags & DWC3_EP_ENABLED) || !dep->endpoint.desc) { |
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| 861 | + seq_puts(s, "--\n"); |
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756 | 862 | goto out; |
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757 | 863 | } |
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758 | 864 | |
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759 | 865 | switch (usb_endpoint_type(dep->endpoint.desc)) { |
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760 | 866 | case USB_ENDPOINT_XFER_CONTROL: |
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761 | | - seq_printf(s, "control\n"); |
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| 867 | + seq_puts(s, "control\n"); |
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762 | 868 | break; |
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763 | 869 | case USB_ENDPOINT_XFER_ISOC: |
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764 | | - seq_printf(s, "isochronous\n"); |
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| 870 | + seq_puts(s, "isochronous\n"); |
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765 | 871 | break; |
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766 | 872 | case USB_ENDPOINT_XFER_BULK: |
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767 | | - seq_printf(s, "bulk\n"); |
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| 873 | + seq_puts(s, "bulk\n"); |
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768 | 874 | break; |
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769 | 875 | case USB_ENDPOINT_XFER_INT: |
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770 | | - seq_printf(s, "interrupt\n"); |
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| 876 | + seq_puts(s, "interrupt\n"); |
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771 | 877 | break; |
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772 | 878 | default: |
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773 | | - seq_printf(s, "--\n"); |
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| 879 | + seq_puts(s, "--\n"); |
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774 | 880 | } |
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775 | 881 | |
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776 | 882 | out: |
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.. | .. |
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785 | 891 | struct dwc3 *dwc = dep->dwc; |
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786 | 892 | unsigned long flags; |
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787 | 893 | int i; |
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| 894 | + int ret; |
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| 895 | + |
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| 896 | + ret = pm_runtime_resume_and_get(dwc->dev); |
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| 897 | + if (ret < 0) |
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| 898 | + return ret; |
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788 | 899 | |
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789 | 900 | spin_lock_irqsave(&dwc->lock, flags); |
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790 | 901 | if (dep->number <= 1) { |
---|
791 | | - seq_printf(s, "--\n"); |
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| 902 | + seq_puts(s, "--\n"); |
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792 | 903 | goto out; |
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793 | 904 | } |
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794 | 905 | |
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795 | | - seq_printf(s, "buffer_addr,size,type,ioc,isp_imi,csp,chn,lst,hwo\n"); |
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| 906 | + seq_puts(s, "buffer_addr,size,type,ioc,isp_imi,csp,chn,lst,hwo\n"); |
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796 | 907 | |
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797 | 908 | for (i = 0; i < DWC3_TRB_NUM; i++) { |
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798 | 909 | struct dwc3_trb *trb = &dep->trb_pool[i]; |
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.. | .. |
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814 | 925 | out: |
---|
815 | 926 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
816 | 927 | |
---|
| 928 | + pm_runtime_put_sync(dwc->dev); |
---|
| 929 | + |
---|
817 | 930 | return 0; |
---|
818 | 931 | } |
---|
819 | 932 | |
---|
.. | .. |
---|
826 | 939 | u32 lower_32_bits; |
---|
827 | 940 | u32 upper_32_bits; |
---|
828 | 941 | u32 reg; |
---|
| 942 | + int ret; |
---|
| 943 | + |
---|
| 944 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 945 | + if (ret < 0) |
---|
| 946 | + return ret; |
---|
829 | 947 | |
---|
830 | 948 | spin_lock_irqsave(&dwc->lock, flags); |
---|
831 | 949 | reg = DWC3_GDBGLSPMUX_EPSELECT(dep->number); |
---|
.. | .. |
---|
837 | 955 | ep_info = ((u64)upper_32_bits << 32) | lower_32_bits; |
---|
838 | 956 | seq_printf(s, "0x%016llx\n", ep_info); |
---|
839 | 957 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 958 | + |
---|
| 959 | + pm_runtime_put_sync(dwc->dev); |
---|
840 | 960 | |
---|
841 | 961 | return 0; |
---|
842 | 962 | } |
---|
.. | .. |
---|
874 | 994 | const struct file_operations *fops = dwc3_ep_file_map[i].fops; |
---|
875 | 995 | const char *name = dwc3_ep_file_map[i].name; |
---|
876 | 996 | |
---|
877 | | - debugfs_create_file(name, S_IRUGO, parent, dep, fops); |
---|
| 997 | + debugfs_create_file(name, 0444, parent, dep, fops); |
---|
878 | 998 | } |
---|
879 | 999 | } |
---|
880 | 1000 | |
---|
.. | .. |
---|
899 | 1019 | dwc->regset->regs = dwc3_regs; |
---|
900 | 1020 | dwc->regset->nregs = ARRAY_SIZE(dwc3_regs); |
---|
901 | 1021 | dwc->regset->base = dwc->regs - DWC3_GLOBALS_REGS_START; |
---|
| 1022 | + dwc->regset->dev = dwc->dev; |
---|
902 | 1023 | |
---|
903 | | - root = debugfs_create_dir(dev_name(dwc->dev), NULL); |
---|
| 1024 | + root = debugfs_create_dir(dev_name(dwc->dev), usb_debug_root); |
---|
904 | 1025 | dwc->root = root; |
---|
905 | 1026 | |
---|
906 | | - debugfs_create_regset32("regdump", S_IRUGO, root, dwc->regset); |
---|
| 1027 | + debugfs_create_regset32("regdump", 0444, root, dwc->regset); |
---|
| 1028 | + debugfs_create_file("lsp_dump", 0644, root, dwc, &dwc3_lsp_fops); |
---|
907 | 1029 | |
---|
908 | | - debugfs_create_file("lsp_dump", S_IRUGO | S_IWUSR, root, dwc, |
---|
909 | | - &dwc3_lsp_fops); |
---|
910 | | - |
---|
911 | | - if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)) { |
---|
912 | | - debugfs_create_file("mode", S_IRUGO | S_IWUSR, root, dwc, |
---|
| 1030 | + if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)) |
---|
| 1031 | + debugfs_create_file("mode", 0644, root, dwc, |
---|
913 | 1032 | &dwc3_mode_fops); |
---|
914 | | - } |
---|
915 | 1033 | |
---|
916 | 1034 | if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) || |
---|
917 | 1035 | IS_ENABLED(CONFIG_USB_DWC3_GADGET)) { |
---|
918 | | - debugfs_create_file("testmode", S_IRUGO | S_IWUSR, root, dwc, |
---|
919 | | - &dwc3_testmode_fops); |
---|
920 | | - debugfs_create_file("link_state", S_IRUGO | S_IWUSR, root, dwc, |
---|
| 1036 | + debugfs_create_file("testmode", 0644, root, dwc, |
---|
| 1037 | + &dwc3_testmode_fops); |
---|
| 1038 | + debugfs_create_file("link_state", 0644, root, dwc, |
---|
921 | 1039 | &dwc3_link_state_fops); |
---|
922 | 1040 | } |
---|
923 | 1041 | } |
---|