.. | .. |
---|
327 | 327 | unsigned int current_mode; |
---|
328 | 328 | unsigned long flags; |
---|
329 | 329 | u32 reg; |
---|
| 330 | + int ret; |
---|
| 331 | + |
---|
| 332 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 333 | + if (ret < 0) |
---|
| 334 | + return ret; |
---|
330 | 335 | |
---|
331 | 336 | spin_lock_irqsave(&dwc->lock, flags); |
---|
332 | 337 | reg = dwc3_readl(dwc->regs, DWC3_GSTS); |
---|
.. | .. |
---|
344 | 349 | break; |
---|
345 | 350 | } |
---|
346 | 351 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 352 | + |
---|
| 353 | + pm_runtime_put_sync(dwc->dev); |
---|
347 | 354 | |
---|
348 | 355 | return 0; |
---|
349 | 356 | } |
---|
.. | .. |
---|
390 | 397 | struct dwc3 *dwc = s->private; |
---|
391 | 398 | unsigned long flags; |
---|
392 | 399 | u32 reg; |
---|
| 400 | + int ret; |
---|
| 401 | + |
---|
| 402 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 403 | + if (ret < 0) |
---|
| 404 | + return ret; |
---|
393 | 405 | |
---|
394 | 406 | spin_lock_irqsave(&dwc->lock, flags); |
---|
395 | 407 | reg = dwc3_readl(dwc->regs, DWC3_GCTL); |
---|
.. | .. |
---|
408 | 420 | default: |
---|
409 | 421 | seq_printf(s, "UNKNOWN %08x\n", DWC3_GCTL_PRTCAP(reg)); |
---|
410 | 422 | } |
---|
| 423 | + |
---|
| 424 | + pm_runtime_put_sync(dwc->dev); |
---|
411 | 425 | |
---|
412 | 426 | return 0; |
---|
413 | 427 | } |
---|
.. | .. |
---|
462 | 476 | struct dwc3 *dwc = s->private; |
---|
463 | 477 | unsigned long flags; |
---|
464 | 478 | u32 reg; |
---|
| 479 | + int ret; |
---|
| 480 | + |
---|
| 481 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 482 | + if (ret < 0) |
---|
| 483 | + return ret; |
---|
465 | 484 | |
---|
466 | 485 | spin_lock_irqsave(&dwc->lock, flags); |
---|
467 | 486 | reg = dwc3_readl(dwc->regs, DWC3_DCTL); |
---|
.. | .. |
---|
492 | 511 | seq_printf(s, "UNKNOWN %d\n", reg); |
---|
493 | 512 | } |
---|
494 | 513 | |
---|
| 514 | + pm_runtime_put_sync(dwc->dev); |
---|
| 515 | + |
---|
495 | 516 | return 0; |
---|
496 | 517 | } |
---|
497 | 518 | |
---|
.. | .. |
---|
508 | 529 | unsigned long flags; |
---|
509 | 530 | u32 testmode = 0; |
---|
510 | 531 | char buf[32]; |
---|
| 532 | + int ret; |
---|
511 | 533 | |
---|
512 | 534 | if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) |
---|
513 | 535 | return -EFAULT; |
---|
.. | .. |
---|
525 | 547 | else |
---|
526 | 548 | testmode = 0; |
---|
527 | 549 | |
---|
| 550 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 551 | + if (ret < 0) |
---|
| 552 | + return ret; |
---|
| 553 | + |
---|
528 | 554 | spin_lock_irqsave(&dwc->lock, flags); |
---|
529 | 555 | dwc3_gadget_set_test_mode(dwc, testmode); |
---|
530 | 556 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 557 | + |
---|
| 558 | + pm_runtime_put_sync(dwc->dev); |
---|
531 | 559 | |
---|
532 | 560 | return count; |
---|
533 | 561 | } |
---|
.. | .. |
---|
547 | 575 | enum dwc3_link_state state; |
---|
548 | 576 | u32 reg; |
---|
549 | 577 | u8 speed; |
---|
| 578 | + int ret; |
---|
| 579 | + |
---|
| 580 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 581 | + if (ret < 0) |
---|
| 582 | + return ret; |
---|
550 | 583 | |
---|
551 | 584 | spin_lock_irqsave(&dwc->lock, flags); |
---|
552 | 585 | reg = dwc3_readl(dwc->regs, DWC3_GSTS); |
---|
553 | 586 | if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) { |
---|
554 | 587 | seq_puts(s, "Not available\n"); |
---|
555 | 588 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 589 | + pm_runtime_put_sync(dwc->dev); |
---|
556 | 590 | return 0; |
---|
557 | 591 | } |
---|
558 | 592 | |
---|
.. | .. |
---|
564 | 598 | dwc3_gadget_link_string(state) : |
---|
565 | 599 | dwc3_gadget_hs_link_string(state)); |
---|
566 | 600 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 601 | + |
---|
| 602 | + pm_runtime_put_sync(dwc->dev); |
---|
567 | 603 | |
---|
568 | 604 | return 0; |
---|
569 | 605 | } |
---|
.. | .. |
---|
583 | 619 | char buf[32]; |
---|
584 | 620 | u32 reg; |
---|
585 | 621 | u8 speed; |
---|
| 622 | + int ret; |
---|
586 | 623 | |
---|
587 | 624 | if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) |
---|
588 | 625 | return -EFAULT; |
---|
.. | .. |
---|
602 | 639 | else |
---|
603 | 640 | return -EINVAL; |
---|
604 | 641 | |
---|
| 642 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 643 | + if (ret < 0) |
---|
| 644 | + return ret; |
---|
| 645 | + |
---|
605 | 646 | spin_lock_irqsave(&dwc->lock, flags); |
---|
606 | 647 | reg = dwc3_readl(dwc->regs, DWC3_GSTS); |
---|
607 | 648 | if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) { |
---|
608 | 649 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 650 | + pm_runtime_put_sync(dwc->dev); |
---|
609 | 651 | return -EINVAL; |
---|
610 | 652 | } |
---|
611 | 653 | |
---|
.. | .. |
---|
615 | 657 | if (speed < DWC3_DSTS_SUPERSPEED && |
---|
616 | 658 | state != DWC3_LINK_STATE_RECOV) { |
---|
617 | 659 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 660 | + pm_runtime_put_sync(dwc->dev); |
---|
618 | 661 | return -EINVAL; |
---|
619 | 662 | } |
---|
620 | 663 | |
---|
621 | 664 | dwc3_gadget_set_link_state(dwc, state); |
---|
622 | 665 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 666 | + |
---|
| 667 | + pm_runtime_put_sync(dwc->dev); |
---|
623 | 668 | |
---|
624 | 669 | return count; |
---|
625 | 670 | } |
---|
.. | .. |
---|
644 | 689 | unsigned long flags; |
---|
645 | 690 | u32 mdwidth; |
---|
646 | 691 | u32 val; |
---|
| 692 | + int ret; |
---|
| 693 | + |
---|
| 694 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 695 | + if (ret < 0) |
---|
| 696 | + return ret; |
---|
647 | 697 | |
---|
648 | 698 | spin_lock_irqsave(&dwc->lock, flags); |
---|
649 | 699 | val = dwc3_core_fifo_space(dep, DWC3_TXFIFO); |
---|
.. | .. |
---|
656 | 706 | seq_printf(s, "%u\n", val); |
---|
657 | 707 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
658 | 708 | |
---|
| 709 | + pm_runtime_put_sync(dwc->dev); |
---|
| 710 | + |
---|
659 | 711 | return 0; |
---|
660 | 712 | } |
---|
661 | 713 | |
---|
.. | .. |
---|
666 | 718 | unsigned long flags; |
---|
667 | 719 | u32 mdwidth; |
---|
668 | 720 | u32 val; |
---|
| 721 | + int ret; |
---|
| 722 | + |
---|
| 723 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 724 | + if (ret < 0) |
---|
| 725 | + return ret; |
---|
669 | 726 | |
---|
670 | 727 | spin_lock_irqsave(&dwc->lock, flags); |
---|
671 | 728 | val = dwc3_core_fifo_space(dep, DWC3_RXFIFO); |
---|
.. | .. |
---|
678 | 735 | seq_printf(s, "%u\n", val); |
---|
679 | 736 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
680 | 737 | |
---|
| 738 | + pm_runtime_put_sync(dwc->dev); |
---|
| 739 | + |
---|
681 | 740 | return 0; |
---|
682 | 741 | } |
---|
683 | 742 | |
---|
.. | .. |
---|
687 | 746 | struct dwc3 *dwc = dep->dwc; |
---|
688 | 747 | unsigned long flags; |
---|
689 | 748 | u32 val; |
---|
| 749 | + int ret; |
---|
| 750 | + |
---|
| 751 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 752 | + if (ret < 0) |
---|
| 753 | + return ret; |
---|
690 | 754 | |
---|
691 | 755 | spin_lock_irqsave(&dwc->lock, flags); |
---|
692 | 756 | val = dwc3_core_fifo_space(dep, DWC3_TXREQQ); |
---|
693 | 757 | seq_printf(s, "%u\n", val); |
---|
694 | 758 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 759 | + |
---|
| 760 | + pm_runtime_put_sync(dwc->dev); |
---|
695 | 761 | |
---|
696 | 762 | return 0; |
---|
697 | 763 | } |
---|
.. | .. |
---|
702 | 768 | struct dwc3 *dwc = dep->dwc; |
---|
703 | 769 | unsigned long flags; |
---|
704 | 770 | u32 val; |
---|
| 771 | + int ret; |
---|
| 772 | + |
---|
| 773 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 774 | + if (ret < 0) |
---|
| 775 | + return ret; |
---|
705 | 776 | |
---|
706 | 777 | spin_lock_irqsave(&dwc->lock, flags); |
---|
707 | 778 | val = dwc3_core_fifo_space(dep, DWC3_RXREQQ); |
---|
708 | 779 | seq_printf(s, "%u\n", val); |
---|
709 | 780 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 781 | + |
---|
| 782 | + pm_runtime_put_sync(dwc->dev); |
---|
710 | 783 | |
---|
711 | 784 | return 0; |
---|
712 | 785 | } |
---|
.. | .. |
---|
717 | 790 | struct dwc3 *dwc = dep->dwc; |
---|
718 | 791 | unsigned long flags; |
---|
719 | 792 | u32 val; |
---|
| 793 | + int ret; |
---|
| 794 | + |
---|
| 795 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 796 | + if (ret < 0) |
---|
| 797 | + return ret; |
---|
720 | 798 | |
---|
721 | 799 | spin_lock_irqsave(&dwc->lock, flags); |
---|
722 | 800 | val = dwc3_core_fifo_space(dep, DWC3_RXINFOQ); |
---|
723 | 801 | seq_printf(s, "%u\n", val); |
---|
724 | 802 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 803 | + |
---|
| 804 | + pm_runtime_put_sync(dwc->dev); |
---|
725 | 805 | |
---|
726 | 806 | return 0; |
---|
727 | 807 | } |
---|
.. | .. |
---|
732 | 812 | struct dwc3 *dwc = dep->dwc; |
---|
733 | 813 | unsigned long flags; |
---|
734 | 814 | u32 val; |
---|
| 815 | + int ret; |
---|
| 816 | + |
---|
| 817 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 818 | + if (ret < 0) |
---|
| 819 | + return ret; |
---|
735 | 820 | |
---|
736 | 821 | spin_lock_irqsave(&dwc->lock, flags); |
---|
737 | 822 | val = dwc3_core_fifo_space(dep, DWC3_DESCFETCHQ); |
---|
738 | 823 | seq_printf(s, "%u\n", val); |
---|
739 | 824 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 825 | + |
---|
| 826 | + pm_runtime_put_sync(dwc->dev); |
---|
740 | 827 | |
---|
741 | 828 | return 0; |
---|
742 | 829 | } |
---|
.. | .. |
---|
747 | 834 | struct dwc3 *dwc = dep->dwc; |
---|
748 | 835 | unsigned long flags; |
---|
749 | 836 | u32 val; |
---|
| 837 | + int ret; |
---|
| 838 | + |
---|
| 839 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 840 | + if (ret < 0) |
---|
| 841 | + return ret; |
---|
750 | 842 | |
---|
751 | 843 | spin_lock_irqsave(&dwc->lock, flags); |
---|
752 | 844 | val = dwc3_core_fifo_space(dep, DWC3_EVENTQ); |
---|
753 | 845 | seq_printf(s, "%u\n", val); |
---|
754 | 846 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 847 | + |
---|
| 848 | + pm_runtime_put_sync(dwc->dev); |
---|
755 | 849 | |
---|
756 | 850 | return 0; |
---|
757 | 851 | } |
---|
.. | .. |
---|
797 | 891 | struct dwc3 *dwc = dep->dwc; |
---|
798 | 892 | unsigned long flags; |
---|
799 | 893 | int i; |
---|
| 894 | + int ret; |
---|
| 895 | + |
---|
| 896 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 897 | + if (ret < 0) |
---|
| 898 | + return ret; |
---|
800 | 899 | |
---|
801 | 900 | spin_lock_irqsave(&dwc->lock, flags); |
---|
802 | 901 | if (dep->number <= 1) { |
---|
.. | .. |
---|
826 | 925 | out: |
---|
827 | 926 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
828 | 927 | |
---|
| 928 | + pm_runtime_put_sync(dwc->dev); |
---|
| 929 | + |
---|
829 | 930 | return 0; |
---|
830 | 931 | } |
---|
831 | 932 | |
---|
.. | .. |
---|
838 | 939 | u32 lower_32_bits; |
---|
839 | 940 | u32 upper_32_bits; |
---|
840 | 941 | u32 reg; |
---|
| 942 | + int ret; |
---|
| 943 | + |
---|
| 944 | + ret = pm_runtime_resume_and_get(dwc->dev); |
---|
| 945 | + if (ret < 0) |
---|
| 946 | + return ret; |
---|
841 | 947 | |
---|
842 | 948 | spin_lock_irqsave(&dwc->lock, flags); |
---|
843 | 949 | reg = DWC3_GDBGLSPMUX_EPSELECT(dep->number); |
---|
.. | .. |
---|
849 | 955 | ep_info = ((u64)upper_32_bits << 32) | lower_32_bits; |
---|
850 | 956 | seq_printf(s, "0x%016llx\n", ep_info); |
---|
851 | 957 | spin_unlock_irqrestore(&dwc->lock, flags); |
---|
| 958 | + |
---|
| 959 | + pm_runtime_put_sync(dwc->dev); |
---|
852 | 960 | |
---|
853 | 961 | return 0; |
---|
854 | 962 | } |
---|
.. | .. |
---|
911 | 1019 | dwc->regset->regs = dwc3_regs; |
---|
912 | 1020 | dwc->regset->nregs = ARRAY_SIZE(dwc3_regs); |
---|
913 | 1021 | dwc->regset->base = dwc->regs - DWC3_GLOBALS_REGS_START; |
---|
| 1022 | + dwc->regset->dev = dwc->dev; |
---|
914 | 1023 | |
---|
915 | 1024 | root = debugfs_create_dir(dev_name(dwc->dev), usb_debug_root); |
---|
916 | 1025 | dwc->root = root; |
---|