hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/usb/chipidea/ci_hdrc_tegra.c
....@@ -24,35 +24,23 @@
2424 unsigned long flags;
2525 };
2626
27
-static const struct tegra_udc_soc_info tegra20_udc_soc_info = {
28
- .flags = CI_HDRC_REQUIRES_ALIGNED_DMA,
29
-};
30
-
31
-static const struct tegra_udc_soc_info tegra30_udc_soc_info = {
32
- .flags = CI_HDRC_REQUIRES_ALIGNED_DMA,
33
-};
34
-
35
-static const struct tegra_udc_soc_info tegra114_udc_soc_info = {
36
- .flags = CI_HDRC_REQUIRES_ALIGNED_DMA,
37
-};
38
-
39
-static const struct tegra_udc_soc_info tegra124_udc_soc_info = {
27
+static const struct tegra_udc_soc_info tegra_udc_soc_info = {
4028 .flags = CI_HDRC_REQUIRES_ALIGNED_DMA,
4129 };
4230
4331 static const struct of_device_id tegra_udc_of_match[] = {
4432 {
4533 .compatible = "nvidia,tegra20-udc",
46
- .data = &tegra20_udc_soc_info,
34
+ .data = &tegra_udc_soc_info,
4735 }, {
4836 .compatible = "nvidia,tegra30-udc",
49
- .data = &tegra30_udc_soc_info,
37
+ .data = &tegra_udc_soc_info,
5038 }, {
5139 .compatible = "nvidia,tegra114-udc",
52
- .data = &tegra114_udc_soc_info,
40
+ .data = &tegra_udc_soc_info,
5341 }, {
5442 .compatible = "nvidia,tegra124-udc",
55
- .data = &tegra124_udc_soc_info,
43
+ .data = &tegra_udc_soc_info,
5644 }, {
5745 /* sentinel */
5846 }
....@@ -95,13 +83,6 @@
9583 return err;
9684 }
9785
98
- /*
99
- * Tegra's USB PHY driver doesn't implement optional phy_init()
100
- * hook, so we have to power on UDC controller before ChipIdea
101
- * driver initialization kicks in.
102
- */
103
- usb_phy_set_suspend(udc->phy, 0);
104
-
10586 /* setup and register ChipIdea HDRC device */
10687 udc->data.name = "tegra-udc";
10788 udc->data.flags = soc->flags;
....@@ -121,7 +102,6 @@
121102 return 0;
122103
123104 fail_power_off:
124
- usb_phy_set_suspend(udc->phy, 1);
125105 clk_disable_unprepare(udc->clk);
126106 return err;
127107 }
....@@ -131,7 +111,6 @@
131111 struct tegra_udc *udc = platform_get_drvdata(pdev);
132112
133113 ci_hdrc_remove_device(udc->dev);
134
- usb_phy_set_suspend(udc->phy, 1);
135114 clk_disable_unprepare(udc->clk);
136115
137116 return 0;