add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/tty/serial/sccnxp.c
..
..
@@ -7,11 +7,8 @@
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  *  Based on sc26xx.c, by Thomas Bogendörfer (tsbogend@alpha.franken.de)
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  */
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-#if defined(CONFIG_SERIAL_SCCNXP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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-#define SUPPORT_SYSRQ
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-#endif
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-
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 #include <linux/clk.h>
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+#include <linux/delay.h>
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 #include <linux/err.h>
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 #include <linux/module.h>
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 #include <linux/mod_devicetable.h>
..
..
@@ -47,7 +44,6 @@
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 #	define MR2_STOP1		(7 << 0)
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 #	define MR2_STOP2		(0xf << 0)
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 #define SCCNXP_SR_REG			(0x01)
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-#define SCCNXP_CSR_REG			SCCNXP_SR_REG
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 #	define SR_RXRDY			(1 << 0)
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 #	define SR_FULL			(1 << 1)
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 #	define SR_TXRDY			(1 << 2)
..
..
@@ -56,6 +52,8 @@
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 #	define SR_PE			(1 << 5)
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 #	define SR_FE			(1 << 6)
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 #	define SR_BRK			(1 << 7)
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+#define SCCNXP_CSR_REG			(SCCNXP_SR_REG)
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+#	define CSR_TIMER_MODE		(0x0d)
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 #define SCCNXP_CR_REG			(0x02)
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 #	define CR_RX_ENABLE		(1 << 0)
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 #	define CR_RX_DISABLE		(1 << 1)
..
..
@@ -82,9 +80,12 @@
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 #	define IMR_RXRDY		(1 << 1)
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 #	define ISR_TXRDY(x)		(1 << ((x * 4) + 0))
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 #	define ISR_RXRDY(x)		(1 << ((x * 4) + 1))
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+#define SCCNXP_CTPU_REG			(0x06)
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+#define SCCNXP_CTPL_REG			(0x07)
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 #define SCCNXP_IPR_REG			(0x0d)
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 #define SCCNXP_OPCR_REG			SCCNXP_IPR_REG
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 #define SCCNXP_SOP_REG			(0x0e)
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+#define SCCNXP_START_COUNTER_REG	SCCNXP_SOP_REG
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 #define SCCNXP_ROP_REG			(0x0f)
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90
 
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 /* Route helpers */
..
..
@@ -103,6 +104,8 @@
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 	unsigned long		freq_max;
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 	unsigned int		flags;
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 	unsigned int		fifosize;
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+	/* Time between read/write cycles */
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+	unsigned int		trwd;
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 };
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110
 
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 struct sccnxp_port {
..
..
@@ -137,6 +140,7 @@
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 	.freq_max	= 4000000,
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 	.flags		= SCCNXP_HAVE_IO,
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 	.fifosize	= 3,
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+	.trwd		= 200,
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 };
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145
 
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 static const struct sccnxp_chip sc2691 = {
..
..
@@ -147,6 +151,7 @@
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 	.freq_max	= 4000000,
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 	.flags		= 0,
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 	.fifosize	= 3,
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+	.trwd		= 150,
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 };
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156
 
152
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 static const struct sccnxp_chip sc2692 = {
..
..
@@ -157,6 +162,7 @@
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 	.freq_max	= 4000000,
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 	.flags		= SCCNXP_HAVE_IO,
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 	.fifosize	= 3,
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+	.trwd		= 30,
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 };
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 static const struct sccnxp_chip sc2891 = {
..
..
@@ -167,6 +173,7 @@
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 	.freq_max	= 8000000,
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 	.flags		= SCCNXP_HAVE_IO | SCCNXP_HAVE_MR0,
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 	.fifosize	= 16,
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+	.trwd		= 27,
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 };
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178
 
172
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 static const struct sccnxp_chip sc2892 = {
..
..
@@ -177,6 +184,7 @@
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 	.freq_max	= 8000000,
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 	.flags		= SCCNXP_HAVE_IO | SCCNXP_HAVE_MR0,
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 	.fifosize	= 16,
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+	.trwd		= 17,
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 };
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189
 
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 static const struct sccnxp_chip sc28202 = {
..
..
@@ -187,6 +195,7 @@
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 	.freq_max	= 50000000,
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 	.flags		= SCCNXP_HAVE_IO | SCCNXP_HAVE_MR0,
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 	.fifosize	= 256,
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+	.trwd		= 10,
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 };
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200
 
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 static const struct sccnxp_chip sc68681 = {
..
..
@@ -197,6 +206,7 @@
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 	.freq_max	= 4000000,
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 	.flags		= SCCNXP_HAVE_IO,
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 	.fifosize	= 3,
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+	.trwd		= 200,
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 };
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202
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 static const struct sccnxp_chip sc68692 = {
..
..
@@ -207,24 +217,36 @@
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 	.freq_max	= 4000000,
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 	.flags		= SCCNXP_HAVE_IO,
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 	.fifosize	= 3,
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+	.trwd		= 200,
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221
 };
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222
 
212
-static inline u8 sccnxp_read(struct uart_port *port, u8 reg)
223
+static u8 sccnxp_read(struct uart_port *port, u8 reg)
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 {
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-	return readb(port->membase + (reg << port->regshift));
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+	struct sccnxp_port *s = dev_get_drvdata(port->dev);
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+	u8 ret;
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+
228
+	ret = readb(port->membase + (reg << port->regshift));
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+
230
+	ndelay(s->chip->trwd);
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+
232
+	return ret;
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 }
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234
 
217
-static inline void sccnxp_write(struct uart_port *port, u8 reg, u8 v)
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+static void sccnxp_write(struct uart_port *port, u8 reg, u8 v)
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 {
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+	struct sccnxp_port *s = dev_get_drvdata(port->dev);
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+
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 	writeb(v, port->membase + (reg << port->regshift));
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+
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+	ndelay(s->chip->trwd);
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 }
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222
-static inline u8 sccnxp_port_read(struct uart_port *port, u8 reg)
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+static u8 sccnxp_port_read(struct uart_port *port, u8 reg)
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 {
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 	return sccnxp_read(port, (port->line << 3) + reg);
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 }
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-static inline void sccnxp_port_write(struct uart_port *port, u8 reg, u8 v)
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+static void sccnxp_port_write(struct uart_port *port, u8 reg, u8 v)
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 {
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 	sccnxp_write(port, (port->line << 3) + reg, v);
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 }
..
..
@@ -233,7 +255,7 @@
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 {
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 	int err = abs(a - b);
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-	if ((*besterr < 0) || (*besterr > err)) {
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+	if (*besterr > err) {
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 		*besterr = err;
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 		return 0;
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 	}
..
..
@@ -281,9 +303,21 @@
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 static int sccnxp_set_baud(struct uart_port *port, int baud)
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 {
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 	struct sccnxp_port *s = dev_get_drvdata(port->dev);
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-	int div_std, tmp_baud, bestbaud = baud, besterr = -1;
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+	int div_std, tmp_baud, bestbaud = INT_MAX, besterr = INT_MAX;
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 	struct sccnxp_chip *chip = s->chip;
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 	u8 i, acr = 0, csr = 0, mr0 = 0;
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+
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+	/* Find divisor to load to the timer preset registers */
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+	div_std = DIV_ROUND_CLOSEST(port->uartclk, 2 * 16 * baud);
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+	if ((div_std >= 2) && (div_std <= 0xffff)) {
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+		bestbaud = DIV_ROUND_CLOSEST(port->uartclk, 2 * 16 * div_std);
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+		sccnxp_update_best_err(baud, bestbaud, &besterr);
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+		csr = CSR_TIMER_MODE;
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+		sccnxp_port_write(port, SCCNXP_CTPU_REG, div_std >> 8);
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+		sccnxp_port_write(port, SCCNXP_CTPL_REG, div_std);
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+		/* Issue start timer/counter command */
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+		sccnxp_port_read(port, SCCNXP_START_COUNTER_REG);
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+	}
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 	/* Find best baud from table */
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 	for (i = 0; baud_std[i].baud && besterr; i++) {
..
..
@@ -923,7 +957,6 @@
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 	if (!s->poll) {
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 		s->irq = platform_get_irq(pdev, 0);
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 		if (s->irq < 0) {
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-			dev_err(&pdev->dev, "Missing irq resource data\n");
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 			ret = -ENXIO;
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 			goto err_out;
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 		}
..
..
@@ -963,6 +996,7 @@
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 		s->port[i].regshift	= s->pdata.reg_shift;
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 		s->port[i].uartclk	= uartclk;
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 		s->port[i].ops		= &sccnxp_ops;
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+		s->port[i].has_sysrq = IS_ENABLED(CONFIG_SERIAL_SCCNXP_CONSOLE);
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 		uart_add_one_port(&s->uart, &s->port[i]);
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 		/* Set direction to input */
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 		if (s->chip->flags & SCCNXP_HAVE_IO)