.. | .. |
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1355 | 1355 | static int cqspi_suspend(struct device *dev) |
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1356 | 1356 | { |
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1357 | 1357 | struct cqspi_st *cqspi = dev_get_drvdata(dev); |
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| 1358 | + struct spi_master *master = dev_get_drvdata(dev); |
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| 1359 | + int ret; |
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1358 | 1360 | |
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| 1361 | + ret = spi_master_suspend(master); |
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1359 | 1362 | cqspi_controller_enable(cqspi, 0); |
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1360 | | - return 0; |
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| 1363 | + |
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| 1364 | + clk_disable_unprepare(cqspi->clk); |
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| 1365 | + |
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| 1366 | + return ret; |
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1361 | 1367 | } |
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1362 | 1368 | |
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1363 | 1369 | static int cqspi_resume(struct device *dev) |
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1364 | 1370 | { |
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1365 | 1371 | struct cqspi_st *cqspi = dev_get_drvdata(dev); |
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| 1372 | + struct spi_master *master = dev_get_drvdata(dev); |
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1366 | 1373 | |
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1367 | | - cqspi_controller_enable(cqspi, 1); |
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1368 | | - return 0; |
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| 1374 | + clk_prepare_enable(cqspi->clk); |
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| 1375 | + cqspi_wait_idle(cqspi); |
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| 1376 | + cqspi_controller_init(cqspi); |
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| 1377 | + |
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| 1378 | + cqspi->current_cs = -1; |
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| 1379 | + cqspi->sclk = 0; |
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| 1380 | + |
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| 1381 | + return spi_master_resume(master); |
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1369 | 1382 | } |
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1370 | 1383 | |
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1371 | 1384 | static const struct dev_pm_ops cqspi__dev_pm_ops = { |
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