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2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da 
 kernel/drivers/scsi/mpt3sas/mpi/mpi2_ioc.h
....@@ -1,13 +1,13 @@
11 /* SPDX-License-Identifier: GPL-2.0 */
22 /*
3
- * Copyright 2000-2015 Avago Technologies.  All rights reserved.
3
+ * Copyright 2000-2020 Broadcom Inc. All rights reserved.
44  *
55  *
66  *          Name:  mpi2_ioc.h
77  *         Title:  MPI IOC, Port, Event, FW Download, and FW Upload messages
88  * Creation Date:  October 11, 2006
99  *
10
- * mpi2_ioc.h Version:  02.00.34
10
+ * mpi2_ioc.h Version:  02.00.37
1111  *
1212  * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
1313  *       prefix are for use only on MPI v2.5 products, and must not be used
....@@ -171,6 +171,14 @@
171171  * 09-29-17   02.00.34 Added MPI26_EVENT_PCIDEV_STAT_RC_PCIE_HOT_RESET_FAILED
172172  *                     to the ReasonCode field in PCIe Device Status Change
173173  *                     Event Data.
174
+ * 07-22-18   02.00.35 Added FW_DOWNLOAD_ITYPE_CPLD and _PSOC.
175
+ *                     Moved FW image definitions ionto new mpi2_image,h
176
+ * 08-14-18   02.00.36 Fixed definition of MPI2_FW_DOWNLOAD_ITYPE_PSOC (0x16)
177
+ * 09-07-18   02.00.37 Added MPI26_EVENT_PCIE_TOPO_PI_16_LANES
178
+ * 10-02-19   02.00.38 Added MPI26_IOCINIT_CFGFLAGS_COREDUMP_ENABLE
179
+ *                     Added MPI26_IOCFACTS_CAPABILITY_COREDUMP_ENABLED
180
+ *                     Added MPI2_FW_DOWNLOAD_ITYPE_COREDUMP
181
+ *                     Added MPI2_FW_UPLOAD_ITYPE_COREDUMP
174182  * --------------------------------------------------------------------------
175183  */
176184 
....@@ -244,6 +252,7 @@
244252 
245253 /*ConfigurationFlags */
246254 #define MPI26_IOCINIT_CFGFLAGS_NVME_SGL_FORMAT  (0x0001)
255
+#define MPI26_IOCINIT_CFGFLAGS_COREDUMP_ENABLE  (0x0002)
247256 
248257 /*minimum depth for a Reply Descriptor Post Queue */
249258 #define MPI2_RDPQ_DEPTH_MIN                     (16)
....@@ -373,6 +382,7 @@
373382 /*ProductID field uses MPI2_FW_HEADER_PID_ */
374383 
375384 /*IOCCapabilities */
385
+#define MPI26_IOCFACTS_CAPABILITY_COREDUMP_ENABLED      (0x00200000)
376386 #define MPI26_IOCFACTS_CAPABILITY_PCIE_SRIOV            (0x00100000)
377387 #define MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ            (0x00080000)
378388 #define MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE     (0x00040000)
....@@ -1255,6 +1265,7 @@
12551265 #define MPI26_EVENT_PCIE_TOPO_PI_2_LANES                    (0x20)
12561266 #define MPI26_EVENT_PCIE_TOPO_PI_4_LANES                    (0x30)
12571267 #define MPI26_EVENT_PCIE_TOPO_PI_8_LANES                    (0x40)
1268
+#define MPI26_EVENT_PCIE_TOPO_PI_16_LANES                   (0x50)
12581269 
12591270 #define MPI26_EVENT_PCIE_TOPO_PI_RATE_MASK                  (0x0F)
12601271 #define MPI26_EVENT_PCIE_TOPO_PI_RATE_UNKNOWN               (0x00)
....@@ -1450,6 +1461,10 @@
14501461 #define MPI2_FW_DOWNLOAD_ITYPE_CTLR                 (0x12)
14511462 #define MPI2_FW_DOWNLOAD_ITYPE_IMR_FIRMWARE         (0x13)
14521463 #define MPI2_FW_DOWNLOAD_ITYPE_MR_NVDATA            (0x14)
1464
+/*MPI v2.6 and newer */
1465
+#define MPI2_FW_DOWNLOAD_ITYPE_CPLD                 (0x15)
1466
+#define MPI2_FW_DOWNLOAD_ITYPE_PSOC                 (0x16)
1467
+#define MPI2_FW_DOWNLOAD_ITYPE_COREDUMP             (0x17)
14531468 #define MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC (0xF0)
14541469 
14551470 /*MPI v2.0 FWDownload TransactionContext Element */
....@@ -1596,352 +1611,6 @@
15961611 	U32 ActualImageSize;	/*0x14 */
15971612 } MPI2_FW_UPLOAD_REPLY, *PTR_MPI2_FW_UPLOAD_REPLY,
15981613 	Mpi2FWUploadReply_t, *pMPi2FWUploadReply_t;
1599
-
1600
-/*FW Image Header */
1601
-typedef struct _MPI2_FW_IMAGE_HEADER {
1602
-	U32 Signature;		/*0x00 */
1603
-	U32 Signature0;		/*0x04 */
1604
-	U32 Signature1;		/*0x08 */
1605
-	U32 Signature2;		/*0x0C */
1606
-	MPI2_VERSION_UNION MPIVersion;	/*0x10 */
1607
-	MPI2_VERSION_UNION FWVersion;	/*0x14 */
1608
-	MPI2_VERSION_UNION NVDATAVersion;	/*0x18 */
1609
-	MPI2_VERSION_UNION PackageVersion;	/*0x1C */
1610
-	U16 VendorID;		/*0x20 */
1611
-	U16 ProductID;		/*0x22 */
1612
-	U16 ProtocolFlags;	/*0x24 */
1613
-	U16 Reserved26;		/*0x26 */
1614
-	U32 IOCCapabilities;	/*0x28 */
1615
-	U32 ImageSize;		/*0x2C */
1616
-	U32 NextImageHeaderOffset;	/*0x30 */
1617
-	U32 Checksum;		/*0x34 */
1618
-	U32 Reserved38;		/*0x38 */
1619
-	U32 Reserved3C;		/*0x3C */
1620
-	U32 Reserved40;		/*0x40 */
1621
-	U32 Reserved44;		/*0x44 */
1622
-	U32 Reserved48;		/*0x48 */
1623
-	U32 Reserved4C;		/*0x4C */
1624
-	U32 Reserved50;		/*0x50 */
1625
-	U32 Reserved54;		/*0x54 */
1626
-	U32 Reserved58;		/*0x58 */
1627
-	U32 Reserved5C;		/*0x5C */
1628
-	U32 BootFlags;		/*0x60 */
1629
-	U32 FirmwareVersionNameWhat;	/*0x64 */
1630
-	U8 FirmwareVersionName[32];	/*0x68 */
1631
-	U32 VendorNameWhat;	/*0x88 */
1632
-	U8 VendorName[32];	/*0x8C */
1633
-	U32 PackageNameWhat;	/*0x88 */
1634
-	U8 PackageName[32];	/*0x8C */
1635
-	U32 ReservedD0;		/*0xD0 */
1636
-	U32 ReservedD4;		/*0xD4 */
1637
-	U32 ReservedD8;		/*0xD8 */
1638
-	U32 ReservedDC;		/*0xDC */
1639
-	U32 ReservedE0;		/*0xE0 */
1640
-	U32 ReservedE4;		/*0xE4 */
1641
-	U32 ReservedE8;		/*0xE8 */
1642
-	U32 ReservedEC;		/*0xEC */
1643
-	U32 ReservedF0;		/*0xF0 */
1644
-	U32 ReservedF4;		/*0xF4 */
1645
-	U32 ReservedF8;		/*0xF8 */
1646
-	U32 ReservedFC;		/*0xFC */
1647
-} MPI2_FW_IMAGE_HEADER, *PTR_MPI2_FW_IMAGE_HEADER,
1648
-	Mpi2FWImageHeader_t, *pMpi2FWImageHeader_t;
1649
-
1650
-/*Signature field */
1651
-#define MPI2_FW_HEADER_SIGNATURE_OFFSET         (0x00)
1652
-#define MPI2_FW_HEADER_SIGNATURE_MASK           (0xFF000000)
1653
-#define MPI2_FW_HEADER_SIGNATURE                (0xEA000000)
1654
-#define MPI26_FW_HEADER_SIGNATURE               (0xEB000000)
1655
-
1656
-/*Signature0 field */
1657
-#define MPI2_FW_HEADER_SIGNATURE0_OFFSET        (0x04)
1658
-#define MPI2_FW_HEADER_SIGNATURE0               (0x5AFAA55A)
1659
-/* Last byte is defined by architecture */
1660
-#define MPI26_FW_HEADER_SIGNATURE0_BASE         (0x5AEAA500)
1661
-#define MPI26_FW_HEADER_SIGNATURE0_ARC_0        (0x5A)
1662
-#define MPI26_FW_HEADER_SIGNATURE0_ARC_1        (0x00)
1663
-#define MPI26_FW_HEADER_SIGNATURE0_ARC_2        (0x01)
1664
-/* legacy (0x5AEAA55A) */
1665
-#define MPI26_FW_HEADER_SIGNATURE0_ARC_3        (0x02)
1666
-#define MPI26_FW_HEADER_SIGNATURE0 \
1667
-	(MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_0)
1668
-#define MPI26_FW_HEADER_SIGNATURE0_3516 \
1669
-	(MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_1)
1670
-#define MPI26_FW_HEADER_SIGNATURE0_4008 \
1671
-	(MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_3)
1672
-
1673
-/*Signature1 field */
1674
-#define MPI2_FW_HEADER_SIGNATURE1_OFFSET        (0x08)
1675
-#define MPI2_FW_HEADER_SIGNATURE1               (0xA55AFAA5)
1676
-#define MPI26_FW_HEADER_SIGNATURE1              (0xA55AEAA5)
1677
-
1678
-/*Signature2 field */
1679
-#define MPI2_FW_HEADER_SIGNATURE2_OFFSET        (0x0C)
1680
-#define MPI2_FW_HEADER_SIGNATURE2               (0x5AA55AFA)
1681
-#define MPI26_FW_HEADER_SIGNATURE2              (0x5AA55AEA)
1682
-
1683
-/*defines for using the ProductID field */
1684
-#define MPI2_FW_HEADER_PID_TYPE_MASK            (0xF000)
1685
-#define MPI2_FW_HEADER_PID_TYPE_SAS             (0x2000)
1686
-
1687
-#define MPI2_FW_HEADER_PID_PROD_MASK                    (0x0F00)
1688
-#define MPI2_FW_HEADER_PID_PROD_A                       (0x0000)
1689
-#define MPI2_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI   (0x0200)
1690
-#define MPI2_FW_HEADER_PID_PROD_IR_SCSI                 (0x0700)
1691
-
1692
-#define MPI2_FW_HEADER_PID_FAMILY_MASK          (0x00FF)
1693
-/*SAS ProductID Family bits */
1694
-#define MPI2_FW_HEADER_PID_FAMILY_2108_SAS      (0x0013)
1695
-#define MPI2_FW_HEADER_PID_FAMILY_2208_SAS      (0x0014)
1696
-#define MPI25_FW_HEADER_PID_FAMILY_3108_SAS     (0x0021)
1697
-#define MPI26_FW_HEADER_PID_FAMILY_3324_SAS     (0x0028)
1698
-#define MPI26_FW_HEADER_PID_FAMILY_3516_SAS     (0x0031)
1699
-
1700
-/*use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
1701
-
1702
-/*use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */
1703
-
1704
-#define MPI2_FW_HEADER_IMAGESIZE_OFFSET         (0x2C)
1705
-#define MPI2_FW_HEADER_NEXTIMAGE_OFFSET         (0x30)
1706
-#define MPI26_FW_HEADER_BOOTFLAGS_OFFSET        (0x60)
1707
-#define MPI2_FW_HEADER_VERNMHWAT_OFFSET         (0x64)
1708
-
1709
-#define MPI2_FW_HEADER_WHAT_SIGNATURE           (0x29232840)
1710
-
1711
-#define MPI2_FW_HEADER_SIZE                     (0x100)
1712
-
1713
-/*Extended Image Header */
1714
-typedef struct _MPI2_EXT_IMAGE_HEADER {
1715
-	U8 ImageType;		/*0x00 */
1716
-	U8 Reserved1;		/*0x01 */
1717
-	U16 Reserved2;		/*0x02 */
1718
-	U32 Checksum;		/*0x04 */
1719
-	U32 ImageSize;		/*0x08 */
1720
-	U32 NextImageHeaderOffset;	/*0x0C */
1721
-	U32 PackageVersion;	/*0x10 */
1722
-	U32 Reserved3;		/*0x14 */
1723
-	U32 Reserved4;		/*0x18 */
1724
-	U32 Reserved5;		/*0x1C */
1725
-	U8 IdentifyString[32];	/*0x20 */
1726
-} MPI2_EXT_IMAGE_HEADER, *PTR_MPI2_EXT_IMAGE_HEADER,
1727
-	Mpi2ExtImageHeader_t, *pMpi2ExtImageHeader_t;
1728
-
1729
-/*useful offsets */
1730
-#define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET         (0x00)
1731
-#define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET         (0x08)
1732
-#define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET         (0x0C)
1733
-
1734
-#define MPI2_EXT_IMAGE_HEADER_SIZE              (0x40)
1735
-
1736
-/*defines for the ImageType field */
1737
-#define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED             (0x00)
1738
-#define MPI2_EXT_IMAGE_TYPE_FW                      (0x01)
1739
-#define MPI2_EXT_IMAGE_TYPE_NVDATA                  (0x03)
1740
-#define MPI2_EXT_IMAGE_TYPE_BOOTLOADER              (0x04)
1741
-#define MPI2_EXT_IMAGE_TYPE_INITIALIZATION          (0x05)
1742
-#define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT            (0x06)
1743
-#define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES       (0x07)
1744
-#define MPI2_EXT_IMAGE_TYPE_MEGARAID                (0x08)
1745
-#define MPI2_EXT_IMAGE_TYPE_ENCRYPTED_HASH          (0x09)
1746
-#define MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC    (0x80)
1747
-#define MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC    (0xFF)
1748
-
1749
-#define MPI2_EXT_IMAGE_TYPE_MAX (MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC)
1750
-
1751
-/*FLASH Layout Extended Image Data */
1752
-
1753
-/*
1754
- *Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1755
- *one and check RegionsPerLayout at runtime.
1756
- */
1757
-#ifndef MPI2_FLASH_NUMBER_OF_REGIONS
1758
-#define MPI2_FLASH_NUMBER_OF_REGIONS        (1)
1759
-#endif
1760
-
1761
-/*
1762
- *Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1763
- *one and check NumberOfLayouts at runtime.
1764
- */
1765
-#ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS
1766
-#define MPI2_FLASH_NUMBER_OF_LAYOUTS        (1)
1767
-#endif
1768
-
1769
-typedef struct _MPI2_FLASH_REGION {
1770
-	U8 RegionType;		/*0x00 */
1771
-	U8 Reserved1;		/*0x01 */
1772
-	U16 Reserved2;		/*0x02 */
1773
-	U32 RegionOffset;	/*0x04 */
1774
-	U32 RegionSize;		/*0x08 */
1775
-	U32 Reserved3;		/*0x0C */
1776
-} MPI2_FLASH_REGION, *PTR_MPI2_FLASH_REGION,
1777
-	Mpi2FlashRegion_t, *pMpi2FlashRegion_t;
1778
-
1779
-typedef struct _MPI2_FLASH_LAYOUT {
1780
-	U32 FlashSize;		/*0x00 */
1781
-	U32 Reserved1;		/*0x04 */
1782
-	U32 Reserved2;		/*0x08 */
1783
-	U32 Reserved3;		/*0x0C */
1784
-	MPI2_FLASH_REGION Region[MPI2_FLASH_NUMBER_OF_REGIONS];	/*0x10 */
1785
-} MPI2_FLASH_LAYOUT, *PTR_MPI2_FLASH_LAYOUT,
1786
-	Mpi2FlashLayout_t, *pMpi2FlashLayout_t;
1787
-
1788
-typedef struct _MPI2_FLASH_LAYOUT_DATA {
1789
-	U8 ImageRevision;	/*0x00 */
1790
-	U8 Reserved1;		/*0x01 */
1791
-	U8 SizeOfRegion;	/*0x02 */
1792
-	U8 Reserved2;		/*0x03 */
1793
-	U16 NumberOfLayouts;	/*0x04 */
1794
-	U16 RegionsPerLayout;	/*0x06 */
1795
-	U16 MinimumSectorAlignment;	/*0x08 */
1796
-	U16 Reserved3;		/*0x0A */
1797
-	U32 Reserved4;		/*0x0C */
1798
-	MPI2_FLASH_LAYOUT Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS];	/*0x10 */
1799
-} MPI2_FLASH_LAYOUT_DATA, *PTR_MPI2_FLASH_LAYOUT_DATA,
1800
-	Mpi2FlashLayoutData_t, *pMpi2FlashLayoutData_t;
1801
-
1802
-/*defines for the RegionType field */
1803
-#define MPI2_FLASH_REGION_UNUSED                (0x00)
1804
-#define MPI2_FLASH_REGION_FIRMWARE              (0x01)
1805
-#define MPI2_FLASH_REGION_BIOS                  (0x02)
1806
-#define MPI2_FLASH_REGION_NVDATA                (0x03)
1807
-#define MPI2_FLASH_REGION_FIRMWARE_BACKUP       (0x05)
1808
-#define MPI2_FLASH_REGION_MFG_INFORMATION       (0x06)
1809
-#define MPI2_FLASH_REGION_CONFIG_1              (0x07)
1810
-#define MPI2_FLASH_REGION_CONFIG_2              (0x08)
1811
-#define MPI2_FLASH_REGION_MEGARAID              (0x09)
1812
-#define MPI2_FLASH_REGION_COMMON_BOOT_BLOCK     (0x0A)
1813
-#define MPI2_FLASH_REGION_INIT (MPI2_FLASH_REGION_COMMON_BOOT_BLOCK)
1814
-#define MPI2_FLASH_REGION_CBB_BACKUP            (0x0D)
1815
-#define MPI2_FLASH_REGION_SBR                   (0x0E)
1816
-#define MPI2_FLASH_REGION_SBR_BACKUP            (0x0F)
1817
-#define MPI2_FLASH_REGION_HIIM                  (0x10)
1818
-#define MPI2_FLASH_REGION_HIIA                  (0x11)
1819
-#define MPI2_FLASH_REGION_CTLR                  (0x12)
1820
-#define MPI2_FLASH_REGION_IMR_FIRMWARE          (0x13)
1821
-#define MPI2_FLASH_REGION_MR_NVDATA             (0x14)
1822
-
1823
-/*ImageRevision */
1824
-#define MPI2_FLASH_LAYOUT_IMAGE_REVISION        (0x00)
1825
-
1826
-/*Supported Devices Extended Image Data */
1827
-
1828
-/*
1829
- *Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1830
- *one and check NumberOfDevices at runtime.
1831
- */
1832
-#ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES
1833
-#define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES    (1)
1834
-#endif
1835
-
1836
-typedef struct _MPI2_SUPPORTED_DEVICE {
1837
-	U16 DeviceID;		/*0x00 */
1838
-	U16 VendorID;		/*0x02 */
1839
-	U16 DeviceIDMask;	/*0x04 */
1840
-	U16 Reserved1;		/*0x06 */
1841
-	U8 LowPCIRev;		/*0x08 */
1842
-	U8 HighPCIRev;		/*0x09 */
1843
-	U16 Reserved2;		/*0x0A */
1844
-	U32 Reserved3;		/*0x0C */
1845
-} MPI2_SUPPORTED_DEVICE, *PTR_MPI2_SUPPORTED_DEVICE,
1846
-	Mpi2SupportedDevice_t, *pMpi2SupportedDevice_t;
1847
-
1848
-typedef struct _MPI2_SUPPORTED_DEVICES_DATA {
1849
-	U8 ImageRevision;	/*0x00 */
1850
-	U8 Reserved1;		/*0x01 */
1851
-	U8 NumberOfDevices;	/*0x02 */
1852
-	U8 Reserved2;		/*0x03 */
1853
-	U32 Reserved3;		/*0x04 */
1854
-	MPI2_SUPPORTED_DEVICE
1855
-	SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES];/*0x08 */
1856
-} MPI2_SUPPORTED_DEVICES_DATA, *PTR_MPI2_SUPPORTED_DEVICES_DATA,
1857
-	Mpi2SupportedDevicesData_t, *pMpi2SupportedDevicesData_t;
1858
-
1859
-/*ImageRevision */
1860
-#define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION   (0x00)
1861
-
1862
-/*Init Extended Image Data */
1863
-
1864
-typedef struct _MPI2_INIT_IMAGE_FOOTER {
1865
-	U32 BootFlags;		/*0x00 */
1866
-	U32 ImageSize;		/*0x04 */
1867
-	U32 Signature0;		/*0x08 */
1868
-	U32 Signature1;		/*0x0C */
1869
-	U32 Signature2;		/*0x10 */
1870
-	U32 ResetVector;	/*0x14 */
1871
-} MPI2_INIT_IMAGE_FOOTER, *PTR_MPI2_INIT_IMAGE_FOOTER,
1872
-	Mpi2InitImageFooter_t, *pMpi2InitImageFooter_t;
1873
-
1874
-/*defines for the BootFlags field */
1875
-#define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET        (0x00)
1876
-
1877
-/*defines for the ImageSize field */
1878
-#define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET        (0x04)
1879
-
1880
-/*defines for the Signature0 field */
1881
-#define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET       (0x08)
1882
-#define MPI2_INIT_IMAGE_SIGNATURE0              (0x5AA55AEA)
1883
-
1884
-/*defines for the Signature1 field */
1885
-#define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET       (0x0C)
1886
-#define MPI2_INIT_IMAGE_SIGNATURE1              (0xA55AEAA5)
1887
-
1888
-/*defines for the Signature2 field */
1889
-#define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET       (0x10)
1890
-#define MPI2_INIT_IMAGE_SIGNATURE2              (0x5AEAA55A)
1891
-
1892
-/*Signature fields as individual bytes */
1893
-#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0        (0xEA)
1894
-#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1        (0x5A)
1895
-#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2        (0xA5)
1896
-#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3        (0x5A)
1897
-
1898
-#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4        (0xA5)
1899
-#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5        (0xEA)
1900
-#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6        (0x5A)
1901
-#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7        (0xA5)
1902
-
1903
-#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8        (0x5A)
1904
-#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9        (0xA5)
1905
-#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A        (0xEA)
1906
-#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B        (0x5A)
1907
-
1908
-/*defines for the ResetVector field */
1909
-#define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET      (0x14)
1910
-
1911
-
1912
-/* Encrypted Hash Extended Image Data */
1913
-
1914
-typedef struct _MPI25_ENCRYPTED_HASH_ENTRY {
1915
-	U8		HashImageType;		/* 0x00 */
1916
-	U8		HashAlgorithm;		/* 0x01 */
1917
-	U8		EncryptionAlgorithm;	/* 0x02 */
1918
-	U8		Reserved1;		/* 0x03 */
1919
-	U32		Reserved2;		/* 0x04 */
1920
-	U32		EncryptedHash[1];	/* 0x08 */ /* variable length */
1921
-} MPI25_ENCRYPTED_HASH_ENTRY, *PTR_MPI25_ENCRYPTED_HASH_ENTRY,
1922
-Mpi25EncryptedHashEntry_t, *pMpi25EncryptedHashEntry_t;
1923
-
1924
-/* values for HashImageType */
1925
-#define MPI25_HASH_IMAGE_TYPE_UNUSED		(0x00)
1926
-#define MPI25_HASH_IMAGE_TYPE_FIRMWARE		(0x01)
1927
-#define MPI25_HASH_IMAGE_TYPE_BIOS              (0x02)
1928
-
1929
-/* values for HashAlgorithm */
1930
-#define MPI25_HASH_ALGORITHM_UNUSED		(0x00)
1931
-#define MPI25_HASH_ALGORITHM_SHA256		(0x01)
1932
-
1933
-/* values for EncryptionAlgorithm */
1934
-#define MPI25_ENCRYPTION_ALG_UNUSED		(0x00)
1935
-#define MPI25_ENCRYPTION_ALG_RSA256		(0x01)
1936
-
1937
-typedef struct _MPI25_ENCRYPTED_HASH_DATA {
1938
-	U8				ImageVersion;		/* 0x00 */
1939
-	U8				NumHash;		/* 0x01 */
1940
-	U16				Reserved1;		/* 0x02 */
1941
-	U32				Reserved2;		/* 0x04 */
1942
-	MPI25_ENCRYPTED_HASH_ENTRY	EncryptedHashEntry[1];  /* 0x08 */
1943
-} MPI25_ENCRYPTED_HASH_DATA, *PTR_MPI25_ENCRYPTED_HASH_DATA,
1944
-Mpi25EncryptedHashData_t, *pMpi25EncryptedHashData_t;
19451614 
19461615 
19471616 /****************************************************************************