.. | .. |
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8 | 8 | #include <linux/slab.h> |
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9 | 9 | #include <linux/interrupt.h> |
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10 | 10 | #include <linux/platform_device.h> |
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| 11 | +#include <linux/pm_wakeirq.h> |
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11 | 12 | #include <linux/clk.h> |
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12 | 13 | #include <linux/of.h> |
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13 | 14 | #include <linux/of_device.h> |
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.. | .. |
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183 | 184 | struct rtc_plat_data *pdata = dev_get_drvdata(dev); |
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184 | 185 | void __iomem *ioaddr = pdata->ioaddr; |
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185 | 186 | u32 reg; |
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| 187 | + unsigned long flags; |
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186 | 188 | |
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187 | | - spin_lock_irq(&pdata->rtc->irq_lock); |
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| 189 | + spin_lock_irqsave(&pdata->rtc->irq_lock, flags); |
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188 | 190 | reg = readw(ioaddr + RTC_RTCIENR); |
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189 | 191 | |
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190 | 192 | if (enabled) |
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.. | .. |
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193 | 195 | reg &= ~bit; |
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194 | 196 | |
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195 | 197 | writew(reg, ioaddr + RTC_RTCIENR); |
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196 | | - spin_unlock_irq(&pdata->rtc->irq_lock); |
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| 198 | + spin_unlock_irqrestore(&pdata->rtc->irq_lock, flags); |
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197 | 199 | } |
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198 | 200 | |
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199 | 201 | /* This function is the RTC interrupt service routine. */ |
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.. | .. |
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253 | 255 | /* |
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254 | 256 | * This function sets the internal RTC time based on tm in Gregorian date. |
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255 | 257 | */ |
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256 | | -static int mxc_rtc_set_mmss(struct device *dev, time64_t time) |
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| 258 | +static int mxc_rtc_set_time(struct device *dev, struct rtc_time *tm) |
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257 | 259 | { |
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258 | | - struct rtc_plat_data *pdata = dev_get_drvdata(dev); |
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259 | | - |
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260 | | - /* |
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261 | | - * TTC_DAYR register is 9-bit in MX1 SoC, save time and day of year only |
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262 | | - */ |
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263 | | - if (is_imx1_rtc(pdata)) { |
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264 | | - struct rtc_time tm; |
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265 | | - |
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266 | | - rtc_time64_to_tm(time, &tm); |
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267 | | - tm.tm_year = 70; |
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268 | | - time = rtc_tm_to_time64(&tm); |
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269 | | - } |
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| 260 | + time64_t time = rtc_tm_to_time64(tm); |
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270 | 261 | |
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271 | 262 | /* Avoid roll-over from reading the different registers */ |
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272 | 263 | do { |
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.. | .. |
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310 | 301 | /* RTC layer */ |
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311 | 302 | static const struct rtc_class_ops mxc_rtc_ops = { |
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312 | 303 | .read_time = mxc_rtc_read_time, |
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313 | | - .set_mmss64 = mxc_rtc_set_mmss, |
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| 304 | + .set_time = mxc_rtc_set_time, |
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314 | 305 | .read_alarm = mxc_rtc_read_alarm, |
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315 | 306 | .set_alarm = mxc_rtc_set_alarm, |
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316 | 307 | .alarm_irq_enable = mxc_rtc_alarm_irq_enable, |
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317 | 308 | }; |
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318 | 309 | |
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| 310 | +static void mxc_rtc_action(void *p) |
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| 311 | +{ |
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| 312 | + struct rtc_plat_data *pdata = p; |
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| 313 | + |
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| 314 | + clk_disable_unprepare(pdata->clk_ref); |
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| 315 | + clk_disable_unprepare(pdata->clk_ipg); |
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| 316 | +} |
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| 317 | + |
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319 | 318 | static int mxc_rtc_probe(struct platform_device *pdev) |
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320 | 319 | { |
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321 | | - struct resource *res; |
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322 | 320 | struct rtc_device *rtc; |
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323 | 321 | struct rtc_plat_data *pdata = NULL; |
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324 | 322 | u32 reg; |
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.. | .. |
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336 | 334 | else |
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337 | 335 | pdata->devtype = pdev->id_entry->driver_data; |
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338 | 336 | |
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339 | | - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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340 | | - pdata->ioaddr = devm_ioremap_resource(&pdev->dev, res); |
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| 337 | + pdata->ioaddr = devm_platform_ioremap_resource(pdev, 0); |
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341 | 338 | if (IS_ERR(pdata->ioaddr)) |
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342 | 339 | return PTR_ERR(pdata->ioaddr); |
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| 340 | + |
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| 341 | + rtc = devm_rtc_allocate_device(&pdev->dev); |
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| 342 | + if (IS_ERR(rtc)) |
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| 343 | + return PTR_ERR(rtc); |
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| 344 | + |
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| 345 | + pdata->rtc = rtc; |
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| 346 | + rtc->ops = &mxc_rtc_ops; |
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| 347 | + if (is_imx1_rtc(pdata)) { |
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| 348 | + struct rtc_time tm; |
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| 349 | + |
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| 350 | + /* 9bit days + hours minutes seconds */ |
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| 351 | + rtc->range_max = (1 << 9) * 86400 - 1; |
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| 352 | + |
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| 353 | + /* |
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| 354 | + * Set the start date as beginning of the current year. This can |
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| 355 | + * be overridden using device tree. |
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| 356 | + */ |
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| 357 | + rtc_time64_to_tm(ktime_get_real_seconds(), &tm); |
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| 358 | + rtc->start_secs = mktime64(tm.tm_year, 1, 1, 0, 0, 0); |
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| 359 | + rtc->set_start_time = true; |
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| 360 | + } else { |
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| 361 | + /* 16bit days + hours minutes seconds */ |
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| 362 | + rtc->range_max = (1 << 16) * 86400ULL - 1; |
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| 363 | + } |
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343 | 364 | |
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344 | 365 | pdata->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); |
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345 | 366 | if (IS_ERR(pdata->clk_ipg)) { |
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.. | .. |
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353 | 374 | |
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354 | 375 | pdata->clk_ref = devm_clk_get(&pdev->dev, "ref"); |
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355 | 376 | if (IS_ERR(pdata->clk_ref)) { |
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| 377 | + clk_disable_unprepare(pdata->clk_ipg); |
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356 | 378 | dev_err(&pdev->dev, "unable to get ref clock!\n"); |
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357 | | - ret = PTR_ERR(pdata->clk_ref); |
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358 | | - goto exit_put_clk_ipg; |
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| 379 | + return PTR_ERR(pdata->clk_ref); |
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359 | 380 | } |
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360 | 381 | |
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361 | 382 | ret = clk_prepare_enable(pdata->clk_ref); |
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| 383 | + if (ret) { |
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| 384 | + clk_disable_unprepare(pdata->clk_ipg); |
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| 385 | + return ret; |
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| 386 | + } |
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| 387 | + |
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| 388 | + ret = devm_add_action_or_reset(&pdev->dev, mxc_rtc_action, pdata); |
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362 | 389 | if (ret) |
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363 | | - goto exit_put_clk_ipg; |
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| 390 | + return ret; |
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364 | 391 | |
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365 | 392 | rate = clk_get_rate(pdata->clk_ref); |
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366 | 393 | |
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.. | .. |
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372 | 399 | reg = RTC_INPUT_CLK_38400HZ; |
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373 | 400 | else { |
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374 | 401 | dev_err(&pdev->dev, "rtc clock is not valid (%lu)\n", rate); |
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375 | | - ret = -EINVAL; |
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376 | | - goto exit_put_clk_ref; |
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| 402 | + return -EINVAL; |
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377 | 403 | } |
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378 | 404 | |
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379 | 405 | reg |= RTC_ENABLE_BIT; |
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380 | 406 | writew(reg, (pdata->ioaddr + RTC_RTCCTL)); |
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381 | 407 | if (((readw(pdata->ioaddr + RTC_RTCCTL)) & RTC_ENABLE_BIT) == 0) { |
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382 | 408 | dev_err(&pdev->dev, "hardware module can't be enabled!\n"); |
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383 | | - ret = -EIO; |
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384 | | - goto exit_put_clk_ref; |
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| 409 | + return -EIO; |
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385 | 410 | } |
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386 | 411 | |
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387 | 412 | platform_set_drvdata(pdev, pdata); |
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.. | .. |
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396 | 421 | pdata->irq = -1; |
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397 | 422 | } |
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398 | 423 | |
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399 | | - if (pdata->irq >= 0) |
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| 424 | + if (pdata->irq >= 0) { |
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400 | 425 | device_init_wakeup(&pdev->dev, 1); |
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401 | | - |
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402 | | - rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &mxc_rtc_ops, |
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403 | | - THIS_MODULE); |
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404 | | - if (IS_ERR(rtc)) { |
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405 | | - ret = PTR_ERR(rtc); |
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406 | | - goto exit_put_clk_ref; |
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| 426 | + ret = dev_pm_set_wake_irq(&pdev->dev, pdata->irq); |
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| 427 | + if (ret) |
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| 428 | + dev_err(&pdev->dev, "failed to enable irq wake\n"); |
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407 | 429 | } |
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408 | 430 | |
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409 | | - pdata->rtc = rtc; |
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410 | | - |
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411 | | - return 0; |
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412 | | - |
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413 | | -exit_put_clk_ref: |
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414 | | - clk_disable_unprepare(pdata->clk_ref); |
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415 | | -exit_put_clk_ipg: |
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416 | | - clk_disable_unprepare(pdata->clk_ipg); |
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| 431 | + ret = rtc_register_device(rtc); |
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417 | 432 | |
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418 | 433 | return ret; |
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419 | 434 | } |
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420 | | - |
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421 | | -static int mxc_rtc_remove(struct platform_device *pdev) |
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422 | | -{ |
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423 | | - struct rtc_plat_data *pdata = platform_get_drvdata(pdev); |
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424 | | - |
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425 | | - clk_disable_unprepare(pdata->clk_ref); |
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426 | | - clk_disable_unprepare(pdata->clk_ipg); |
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427 | | - |
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428 | | - return 0; |
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429 | | -} |
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430 | | - |
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431 | | -#ifdef CONFIG_PM_SLEEP |
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432 | | -static int mxc_rtc_suspend(struct device *dev) |
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433 | | -{ |
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434 | | - struct rtc_plat_data *pdata = dev_get_drvdata(dev); |
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435 | | - |
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436 | | - if (device_may_wakeup(dev)) |
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437 | | - enable_irq_wake(pdata->irq); |
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438 | | - |
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439 | | - return 0; |
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440 | | -} |
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441 | | - |
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442 | | -static int mxc_rtc_resume(struct device *dev) |
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443 | | -{ |
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444 | | - struct rtc_plat_data *pdata = dev_get_drvdata(dev); |
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445 | | - |
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446 | | - if (device_may_wakeup(dev)) |
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447 | | - disable_irq_wake(pdata->irq); |
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448 | | - |
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449 | | - return 0; |
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450 | | -} |
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451 | | -#endif |
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452 | | - |
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453 | | -static SIMPLE_DEV_PM_OPS(mxc_rtc_pm_ops, mxc_rtc_suspend, mxc_rtc_resume); |
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454 | 435 | |
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455 | 436 | static struct platform_driver mxc_rtc_driver = { |
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456 | 437 | .driver = { |
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457 | 438 | .name = "mxc_rtc", |
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458 | 439 | .of_match_table = of_match_ptr(imx_rtc_dt_ids), |
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459 | | - .pm = &mxc_rtc_pm_ops, |
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460 | 440 | }, |
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461 | 441 | .id_table = imx_rtc_devtype, |
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462 | 442 | .probe = mxc_rtc_probe, |
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463 | | - .remove = mxc_rtc_remove, |
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464 | 443 | }; |
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465 | 444 | |
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466 | 445 | module_platform_driver(mxc_rtc_driver) |
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