.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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1 | 2 | /* |
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2 | 3 | * A driver for the I2C members of the Abracon AB x8xx RTC family, |
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3 | 4 | * and compatible: AB 1805 and AB 0805 |
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.. | .. |
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5 | 6 | * Copyright 2014-2015 Macq S.A. |
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6 | 7 | * |
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7 | 8 | * Author: Philippe De Muyter <phdm@macqel.be> |
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8 | | - * Author: Alexandre Belloni <alexandre.belloni@free-electrons.com> |
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9 | | - * |
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10 | | - * This program is free software; you can redistribute it and/or modify |
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11 | | - * it under the terms of the GNU General Public License version 2 as |
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12 | | - * published by the Free Software Foundation. |
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| 9 | + * Author: Alexandre Belloni <alexandre.belloni@bootlin.com> |
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13 | 10 | * |
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14 | 11 | */ |
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15 | 12 | |
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16 | 13 | #include <linux/bcd.h> |
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17 | 14 | #include <linux/i2c.h> |
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18 | 15 | #include <linux/module.h> |
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| 16 | +#include <linux/of_device.h> |
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19 | 17 | #include <linux/rtc.h> |
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| 18 | +#include <linux/watchdog.h> |
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20 | 19 | |
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21 | 20 | #define ABX8XX_REG_HTH 0x00 |
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22 | 21 | #define ABX8XX_REG_SC 0x01 |
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.. | .. |
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37 | 36 | |
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38 | 37 | #define ABX8XX_REG_STATUS 0x0f |
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39 | 38 | #define ABX8XX_STATUS_AF BIT(2) |
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| 39 | +#define ABX8XX_STATUS_BLF BIT(4) |
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| 40 | +#define ABX8XX_STATUS_WDT BIT(6) |
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40 | 41 | |
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41 | 42 | #define ABX8XX_REG_CTRL1 0x10 |
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42 | 43 | #define ABX8XX_CTRL_WRITE BIT(0) |
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43 | 44 | #define ABX8XX_CTRL_ARST BIT(2) |
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44 | 45 | #define ABX8XX_CTRL_12_24 BIT(6) |
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| 46 | + |
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| 47 | +#define ABX8XX_REG_CTRL2 0x11 |
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| 48 | +#define ABX8XX_CTRL2_RSVD BIT(5) |
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45 | 49 | |
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46 | 50 | #define ABX8XX_REG_IRQ 0x12 |
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47 | 51 | #define ABX8XX_IRQ_AIE BIT(2) |
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.. | .. |
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61 | 65 | #define ABX8XX_OSS_OF BIT(1) |
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62 | 66 | #define ABX8XX_OSS_OMODE BIT(4) |
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63 | 67 | |
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| 68 | +#define ABX8XX_REG_WDT 0x1b |
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| 69 | +#define ABX8XX_WDT_WDS BIT(7) |
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| 70 | +#define ABX8XX_WDT_BMB_MASK 0x7c |
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| 71 | +#define ABX8XX_WDT_BMB_SHIFT 2 |
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| 72 | +#define ABX8XX_WDT_MAX_TIME (ABX8XX_WDT_BMB_MASK >> ABX8XX_WDT_BMB_SHIFT) |
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| 73 | +#define ABX8XX_WDT_WRB_MASK 0x03 |
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| 74 | +#define ABX8XX_WDT_WRB_1HZ 0x02 |
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| 75 | + |
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64 | 76 | #define ABX8XX_REG_CFG_KEY 0x1f |
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65 | 77 | #define ABX8XX_CFG_KEY_OSC 0xa1 |
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66 | 78 | #define ABX8XX_CFG_KEY_MISC 0x9d |
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67 | 79 | |
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68 | 80 | #define ABX8XX_REG_ID0 0x28 |
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| 81 | + |
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| 82 | +#define ABX8XX_REG_OUT_CTRL 0x30 |
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| 83 | +#define ABX8XX_OUT_CTRL_EXDS BIT(4) |
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69 | 84 | |
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70 | 85 | #define ABX8XX_REG_TRICKLE 0x20 |
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71 | 86 | #define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0 |
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.. | .. |
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75 | 90 | static u8 trickle_resistors[] = {0, 3, 6, 11}; |
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76 | 91 | |
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77 | 92 | enum abx80x_chip {AB0801, AB0803, AB0804, AB0805, |
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78 | | - AB1801, AB1803, AB1804, AB1805, ABX80X}; |
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| 93 | + AB1801, AB1803, AB1804, AB1805, RV1805, ABX80X}; |
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79 | 94 | |
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80 | 95 | struct abx80x_cap { |
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81 | 96 | u16 pn; |
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82 | 97 | bool has_tc; |
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| 98 | + bool has_wdog; |
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83 | 99 | }; |
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84 | 100 | |
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85 | 101 | static struct abx80x_cap abx80x_caps[] = { |
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86 | 102 | [AB0801] = {.pn = 0x0801}, |
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87 | 103 | [AB0803] = {.pn = 0x0803}, |
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88 | | - [AB0804] = {.pn = 0x0804, .has_tc = true}, |
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89 | | - [AB0805] = {.pn = 0x0805, .has_tc = true}, |
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| 104 | + [AB0804] = {.pn = 0x0804, .has_tc = true, .has_wdog = true}, |
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| 105 | + [AB0805] = {.pn = 0x0805, .has_tc = true, .has_wdog = true}, |
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90 | 106 | [AB1801] = {.pn = 0x1801}, |
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91 | 107 | [AB1803] = {.pn = 0x1803}, |
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92 | | - [AB1804] = {.pn = 0x1804, .has_tc = true}, |
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93 | | - [AB1805] = {.pn = 0x1805, .has_tc = true}, |
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| 108 | + [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true}, |
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| 109 | + [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true}, |
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| 110 | + [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true}, |
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94 | 111 | [ABX80X] = {.pn = 0} |
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| 112 | +}; |
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| 113 | + |
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| 114 | +struct abx80x_priv { |
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| 115 | + struct rtc_device *rtc; |
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| 116 | + struct i2c_client *client; |
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| 117 | + struct watchdog_device wdog; |
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95 | 118 | }; |
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96 | 119 | |
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97 | 120 | static int abx80x_is_rc_mode(struct i2c_client *client) |
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.. | .. |
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218 | 241 | static irqreturn_t abx80x_handle_irq(int irq, void *dev_id) |
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219 | 242 | { |
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220 | 243 | struct i2c_client *client = dev_id; |
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221 | | - struct rtc_device *rtc = i2c_get_clientdata(client); |
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| 244 | + struct abx80x_priv *priv = i2c_get_clientdata(client); |
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| 245 | + struct rtc_device *rtc = priv->rtc; |
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222 | 246 | int status; |
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223 | 247 | |
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224 | 248 | status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS); |
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.. | .. |
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227 | 251 | |
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228 | 252 | if (status & ABX8XX_STATUS_AF) |
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229 | 253 | rtc_update_irq(rtc, 1, RTC_AF | RTC_IRQF); |
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| 254 | + |
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| 255 | + /* |
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| 256 | + * It is unclear if we'll get an interrupt before the external |
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| 257 | + * reset kicks in. |
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| 258 | + */ |
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| 259 | + if (status & ABX8XX_STATUS_WDT) |
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| 260 | + dev_alert(&client->dev, "watchdog timeout interrupt.\n"); |
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230 | 261 | |
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231 | 262 | i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0); |
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232 | 263 | |
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.. | .. |
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371 | 402 | return -EINVAL; |
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372 | 403 | } |
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373 | 404 | |
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374 | | - retval = abx80x_rtc_set_autocalibration(dev, autocalibration); |
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| 405 | + retval = abx80x_rtc_set_autocalibration(dev->parent, autocalibration); |
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375 | 406 | |
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376 | 407 | return retval ? retval : count; |
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377 | 408 | } |
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.. | .. |
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381 | 412 | { |
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382 | 413 | int autocalibration = 0; |
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383 | 414 | |
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384 | | - autocalibration = abx80x_rtc_get_autocalibration(dev); |
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| 415 | + autocalibration = abx80x_rtc_get_autocalibration(dev->parent); |
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385 | 416 | if (autocalibration < 0) { |
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386 | 417 | dev_err(dev, "Failed to read RTC autocalibration\n"); |
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387 | 418 | sprintf(buf, "0\n"); |
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.. | .. |
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397 | 428 | struct device_attribute *attr, |
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398 | 429 | const char *buf, size_t count) |
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399 | 430 | { |
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400 | | - struct i2c_client *client = to_i2c_client(dev); |
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| 431 | + struct i2c_client *client = to_i2c_client(dev->parent); |
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401 | 432 | int retval, flags, rc_mode = 0; |
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402 | 433 | |
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403 | 434 | if (strncmp(buf, "rc", 2) == 0) { |
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.. | .. |
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439 | 470 | struct device_attribute *attr, char *buf) |
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440 | 471 | { |
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441 | 472 | int rc_mode = 0; |
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442 | | - struct i2c_client *client = to_i2c_client(dev); |
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| 473 | + struct i2c_client *client = to_i2c_client(dev->parent); |
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443 | 474 | |
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444 | 475 | rc_mode = abx80x_is_rc_mode(client); |
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445 | 476 | |
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.. | .. |
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482 | 513 | return err; |
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483 | 514 | } |
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484 | 515 | |
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| 516 | +static int abx80x_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) |
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| 517 | +{ |
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| 518 | + struct i2c_client *client = to_i2c_client(dev); |
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| 519 | + int status, tmp; |
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| 520 | + |
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| 521 | + switch (cmd) { |
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| 522 | + case RTC_VL_READ: |
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| 523 | + status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS); |
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| 524 | + if (status < 0) |
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| 525 | + return status; |
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| 526 | + |
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| 527 | + tmp = status & ABX8XX_STATUS_BLF ? RTC_VL_BACKUP_LOW : 0; |
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| 528 | + |
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| 529 | + return put_user(tmp, (unsigned int __user *)arg); |
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| 530 | + |
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| 531 | + case RTC_VL_CLR: |
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| 532 | + status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS); |
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| 533 | + if (status < 0) |
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| 534 | + return status; |
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| 535 | + |
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| 536 | + status &= ~ABX8XX_STATUS_BLF; |
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| 537 | + |
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| 538 | + tmp = i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0); |
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| 539 | + if (tmp < 0) |
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| 540 | + return tmp; |
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| 541 | + |
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| 542 | + return 0; |
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| 543 | + |
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| 544 | + default: |
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| 545 | + return -ENOIOCTLCMD; |
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| 546 | + } |
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| 547 | +} |
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| 548 | + |
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485 | 549 | static const struct rtc_class_ops abx80x_rtc_ops = { |
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486 | 550 | .read_time = abx80x_rtc_read_time, |
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487 | 551 | .set_time = abx80x_rtc_set_time, |
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488 | 552 | .read_alarm = abx80x_read_alarm, |
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489 | 553 | .set_alarm = abx80x_set_alarm, |
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490 | 554 | .alarm_irq_enable = abx80x_alarm_irq_enable, |
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| 555 | + .ioctl = abx80x_ioctl, |
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491 | 556 | }; |
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492 | 557 | |
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493 | | -static int abx80x_dt_trickle_cfg(struct device_node *np) |
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| 558 | +static int abx80x_dt_trickle_cfg(struct i2c_client *client) |
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494 | 559 | { |
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| 560 | + struct device_node *np = client->dev.of_node; |
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495 | 561 | const char *diode; |
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496 | 562 | int trickle_cfg = 0; |
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497 | 563 | int i, ret; |
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.. | .. |
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501 | 567 | if (ret) |
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502 | 568 | return ret; |
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503 | 569 | |
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504 | | - if (!strcmp(diode, "standard")) |
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| 570 | + if (!strcmp(diode, "standard")) { |
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505 | 571 | trickle_cfg |= ABX8XX_TRICKLE_STANDARD_DIODE; |
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506 | | - else if (!strcmp(diode, "schottky")) |
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| 572 | + } else if (!strcmp(diode, "schottky")) { |
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507 | 573 | trickle_cfg |= ABX8XX_TRICKLE_SCHOTTKY_DIODE; |
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508 | | - else |
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| 574 | + } else { |
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| 575 | + dev_dbg(&client->dev, "Invalid tc-diode value: %s\n", diode); |
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509 | 576 | return -EINVAL; |
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| 577 | + } |
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510 | 578 | |
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511 | 579 | ret = of_property_read_u32(np, "abracon,tc-resistor", &tmp); |
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512 | 580 | if (ret) |
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.. | .. |
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516 | 584 | if (trickle_resistors[i] == tmp) |
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517 | 585 | break; |
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518 | 586 | |
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519 | | - if (i == sizeof(trickle_resistors)) |
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| 587 | + if (i == sizeof(trickle_resistors)) { |
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| 588 | + dev_dbg(&client->dev, "Invalid tc-resistor value: %u\n", tmp); |
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520 | 589 | return -EINVAL; |
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| 590 | + } |
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521 | 591 | |
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522 | 592 | return (trickle_cfg | i); |
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523 | 593 | } |
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524 | 594 | |
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525 | | -static void rtc_calib_remove_sysfs_group(void *_dev) |
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526 | | -{ |
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527 | | - struct device *dev = _dev; |
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| 595 | +#ifdef CONFIG_WATCHDOG |
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528 | 596 | |
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529 | | - sysfs_remove_group(&dev->kobj, &rtc_calib_attr_group); |
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| 597 | +static inline u8 timeout_bits(unsigned int timeout) |
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| 598 | +{ |
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| 599 | + return ((timeout << ABX8XX_WDT_BMB_SHIFT) & ABX8XX_WDT_BMB_MASK) | |
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| 600 | + ABX8XX_WDT_WRB_1HZ; |
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530 | 601 | } |
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| 602 | + |
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| 603 | +static int __abx80x_wdog_set_timeout(struct watchdog_device *wdog, |
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| 604 | + unsigned int timeout) |
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| 605 | +{ |
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| 606 | + struct abx80x_priv *priv = watchdog_get_drvdata(wdog); |
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| 607 | + u8 val = ABX8XX_WDT_WDS | timeout_bits(timeout); |
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| 608 | + |
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| 609 | + /* |
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| 610 | + * Writing any timeout to the WDT register resets the watchdog timer. |
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| 611 | + * Writing 0 disables it. |
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| 612 | + */ |
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| 613 | + return i2c_smbus_write_byte_data(priv->client, ABX8XX_REG_WDT, val); |
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| 614 | +} |
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| 615 | + |
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| 616 | +static int abx80x_wdog_set_timeout(struct watchdog_device *wdog, |
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| 617 | + unsigned int new_timeout) |
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| 618 | +{ |
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| 619 | + int err = 0; |
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| 620 | + |
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| 621 | + if (watchdog_hw_running(wdog)) |
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| 622 | + err = __abx80x_wdog_set_timeout(wdog, new_timeout); |
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| 623 | + |
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| 624 | + if (err == 0) |
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| 625 | + wdog->timeout = new_timeout; |
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| 626 | + |
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| 627 | + return err; |
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| 628 | +} |
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| 629 | + |
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| 630 | +static int abx80x_wdog_ping(struct watchdog_device *wdog) |
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| 631 | +{ |
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| 632 | + return __abx80x_wdog_set_timeout(wdog, wdog->timeout); |
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| 633 | +} |
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| 634 | + |
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| 635 | +static int abx80x_wdog_start(struct watchdog_device *wdog) |
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| 636 | +{ |
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| 637 | + return __abx80x_wdog_set_timeout(wdog, wdog->timeout); |
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| 638 | +} |
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| 639 | + |
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| 640 | +static int abx80x_wdog_stop(struct watchdog_device *wdog) |
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| 641 | +{ |
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| 642 | + return __abx80x_wdog_set_timeout(wdog, 0); |
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| 643 | +} |
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| 644 | + |
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| 645 | +static const struct watchdog_info abx80x_wdog_info = { |
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| 646 | + .identity = "abx80x watchdog", |
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| 647 | + .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE, |
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| 648 | +}; |
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| 649 | + |
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| 650 | +static const struct watchdog_ops abx80x_wdog_ops = { |
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| 651 | + .owner = THIS_MODULE, |
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| 652 | + .start = abx80x_wdog_start, |
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| 653 | + .stop = abx80x_wdog_stop, |
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| 654 | + .ping = abx80x_wdog_ping, |
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| 655 | + .set_timeout = abx80x_wdog_set_timeout, |
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| 656 | +}; |
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| 657 | + |
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| 658 | +static int abx80x_setup_watchdog(struct abx80x_priv *priv) |
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| 659 | +{ |
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| 660 | + priv->wdog.parent = &priv->client->dev; |
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| 661 | + priv->wdog.ops = &abx80x_wdog_ops; |
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| 662 | + priv->wdog.info = &abx80x_wdog_info; |
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| 663 | + priv->wdog.min_timeout = 1; |
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| 664 | + priv->wdog.max_timeout = ABX8XX_WDT_MAX_TIME; |
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| 665 | + priv->wdog.timeout = ABX8XX_WDT_MAX_TIME; |
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| 666 | + |
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| 667 | + watchdog_set_drvdata(&priv->wdog, priv); |
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| 668 | + |
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| 669 | + return devm_watchdog_register_device(&priv->client->dev, &priv->wdog); |
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| 670 | +} |
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| 671 | +#else |
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| 672 | +static int abx80x_setup_watchdog(struct abx80x_priv *priv) |
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| 673 | +{ |
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| 674 | + return 0; |
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| 675 | +} |
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| 676 | +#endif |
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531 | 677 | |
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532 | 678 | static int abx80x_probe(struct i2c_client *client, |
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533 | 679 | const struct i2c_device_id *id) |
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534 | 680 | { |
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535 | 681 | struct device_node *np = client->dev.of_node; |
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536 | | - struct rtc_device *rtc; |
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| 682 | + struct abx80x_priv *priv; |
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537 | 683 | int i, data, err, trickle_cfg = -EINVAL; |
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538 | 684 | char buf[7]; |
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539 | 685 | unsigned int part = id->driver_data; |
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.. | .. |
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577 | 723 | return -EIO; |
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578 | 724 | } |
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579 | 725 | |
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| 726 | + /* Configure RV1805 specifics */ |
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| 727 | + if (part == RV1805) { |
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| 728 | + /* |
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| 729 | + * Avoid accidentally entering test mode. This can happen |
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| 730 | + * on the RV1805 in case the reserved bit 5 in control2 |
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| 731 | + * register is set. RV-1805-C3 datasheet indicates that |
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| 732 | + * the bit should be cleared in section 11h - Control2. |
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| 733 | + */ |
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| 734 | + data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL2); |
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| 735 | + if (data < 0) { |
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| 736 | + dev_err(&client->dev, |
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| 737 | + "Unable to read control2 register\n"); |
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| 738 | + return -EIO; |
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| 739 | + } |
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| 740 | + |
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| 741 | + err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL2, |
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| 742 | + data & ~ABX8XX_CTRL2_RSVD); |
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| 743 | + if (err < 0) { |
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| 744 | + dev_err(&client->dev, |
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| 745 | + "Unable to write control2 register\n"); |
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| 746 | + return -EIO; |
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| 747 | + } |
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| 748 | + |
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| 749 | + /* |
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| 750 | + * Avoid extra power leakage. The RV1805 uses smaller |
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| 751 | + * 10pin package and the EXTI input is not present. |
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| 752 | + * Disable it to avoid leakage. |
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| 753 | + */ |
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| 754 | + data = i2c_smbus_read_byte_data(client, ABX8XX_REG_OUT_CTRL); |
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| 755 | + if (data < 0) { |
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| 756 | + dev_err(&client->dev, |
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| 757 | + "Unable to read output control register\n"); |
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| 758 | + return -EIO; |
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| 759 | + } |
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| 760 | + |
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| 761 | + /* |
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| 762 | + * Write the configuration key register to enable access to |
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| 763 | + * the config2 register |
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| 764 | + */ |
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| 765 | + err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY, |
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| 766 | + ABX8XX_CFG_KEY_MISC); |
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| 767 | + if (err < 0) { |
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| 768 | + dev_err(&client->dev, |
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| 769 | + "Unable to write configuration key\n"); |
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| 770 | + return -EIO; |
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| 771 | + } |
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| 772 | + |
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| 773 | + err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OUT_CTRL, |
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| 774 | + data | ABX8XX_OUT_CTRL_EXDS); |
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| 775 | + if (err < 0) { |
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| 776 | + dev_err(&client->dev, |
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| 777 | + "Unable to write output control register\n"); |
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| 778 | + return -EIO; |
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| 779 | + } |
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| 780 | + } |
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| 781 | + |
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580 | 782 | /* part autodetection */ |
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581 | 783 | if (part == ABX80X) { |
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582 | 784 | for (i = 0; abx80x_caps[i].pn; i++) |
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.. | .. |
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597 | 799 | } |
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598 | 800 | |
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599 | 801 | if (np && abx80x_caps[part].has_tc) |
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600 | | - trickle_cfg = abx80x_dt_trickle_cfg(np); |
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| 802 | + trickle_cfg = abx80x_dt_trickle_cfg(client); |
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601 | 803 | |
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602 | 804 | if (trickle_cfg > 0) { |
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603 | 805 | dev_info(&client->dev, "Enabling trickle charger: %02x\n", |
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.. | .. |
---|
610 | 812 | if (err) |
---|
611 | 813 | return err; |
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612 | 814 | |
---|
613 | | - rtc = devm_rtc_allocate_device(&client->dev); |
---|
614 | | - if (IS_ERR(rtc)) |
---|
615 | | - return PTR_ERR(rtc); |
---|
| 815 | + priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); |
---|
| 816 | + if (priv == NULL) |
---|
| 817 | + return -ENOMEM; |
---|
616 | 818 | |
---|
617 | | - rtc->ops = &abx80x_rtc_ops; |
---|
| 819 | + priv->rtc = devm_rtc_allocate_device(&client->dev); |
---|
| 820 | + if (IS_ERR(priv->rtc)) |
---|
| 821 | + return PTR_ERR(priv->rtc); |
---|
618 | 822 | |
---|
619 | | - i2c_set_clientdata(client, rtc); |
---|
| 823 | + priv->rtc->ops = &abx80x_rtc_ops; |
---|
| 824 | + priv->client = client; |
---|
| 825 | + |
---|
| 826 | + i2c_set_clientdata(client, priv); |
---|
| 827 | + |
---|
| 828 | + if (abx80x_caps[part].has_wdog) { |
---|
| 829 | + err = abx80x_setup_watchdog(priv); |
---|
| 830 | + if (err) |
---|
| 831 | + return err; |
---|
| 832 | + } |
---|
620 | 833 | |
---|
621 | 834 | if (client->irq > 0) { |
---|
622 | 835 | dev_info(&client->dev, "IRQ %d supplied\n", client->irq); |
---|
.. | .. |
---|
631 | 844 | } |
---|
632 | 845 | } |
---|
633 | 846 | |
---|
634 | | - /* Export sysfs entries */ |
---|
635 | | - err = sysfs_create_group(&(&client->dev)->kobj, &rtc_calib_attr_group); |
---|
| 847 | + err = rtc_add_group(priv->rtc, &rtc_calib_attr_group); |
---|
636 | 848 | if (err) { |
---|
637 | 849 | dev_err(&client->dev, "Failed to create sysfs group: %d\n", |
---|
638 | 850 | err); |
---|
639 | 851 | return err; |
---|
640 | 852 | } |
---|
641 | 853 | |
---|
642 | | - err = devm_add_action_or_reset(&client->dev, |
---|
643 | | - rtc_calib_remove_sysfs_group, |
---|
644 | | - &client->dev); |
---|
645 | | - if (err) { |
---|
646 | | - dev_err(&client->dev, |
---|
647 | | - "Failed to add sysfs cleanup action: %d\n", |
---|
648 | | - err); |
---|
649 | | - return err; |
---|
650 | | - } |
---|
651 | | - |
---|
652 | | - err = rtc_register_device(rtc); |
---|
653 | | - |
---|
654 | | - return err; |
---|
655 | | -} |
---|
656 | | - |
---|
657 | | -static int abx80x_remove(struct i2c_client *client) |
---|
658 | | -{ |
---|
659 | | - return 0; |
---|
| 854 | + return rtc_register_device(priv->rtc); |
---|
660 | 855 | } |
---|
661 | 856 | |
---|
662 | 857 | static const struct i2c_device_id abx80x_id[] = { |
---|
.. | .. |
---|
669 | 864 | { "ab1803", AB1803 }, |
---|
670 | 865 | { "ab1804", AB1804 }, |
---|
671 | 866 | { "ab1805", AB1805 }, |
---|
672 | | - { "rv1805", AB1805 }, |
---|
| 867 | + { "rv1805", RV1805 }, |
---|
673 | 868 | { } |
---|
674 | 869 | }; |
---|
675 | 870 | MODULE_DEVICE_TABLE(i2c, abx80x_id); |
---|
676 | 871 | |
---|
| 872 | +#ifdef CONFIG_OF |
---|
| 873 | +static const struct of_device_id abx80x_of_match[] = { |
---|
| 874 | + { |
---|
| 875 | + .compatible = "abracon,abx80x", |
---|
| 876 | + .data = (void *)ABX80X |
---|
| 877 | + }, |
---|
| 878 | + { |
---|
| 879 | + .compatible = "abracon,ab0801", |
---|
| 880 | + .data = (void *)AB0801 |
---|
| 881 | + }, |
---|
| 882 | + { |
---|
| 883 | + .compatible = "abracon,ab0803", |
---|
| 884 | + .data = (void *)AB0803 |
---|
| 885 | + }, |
---|
| 886 | + { |
---|
| 887 | + .compatible = "abracon,ab0804", |
---|
| 888 | + .data = (void *)AB0804 |
---|
| 889 | + }, |
---|
| 890 | + { |
---|
| 891 | + .compatible = "abracon,ab0805", |
---|
| 892 | + .data = (void *)AB0805 |
---|
| 893 | + }, |
---|
| 894 | + { |
---|
| 895 | + .compatible = "abracon,ab1801", |
---|
| 896 | + .data = (void *)AB1801 |
---|
| 897 | + }, |
---|
| 898 | + { |
---|
| 899 | + .compatible = "abracon,ab1803", |
---|
| 900 | + .data = (void *)AB1803 |
---|
| 901 | + }, |
---|
| 902 | + { |
---|
| 903 | + .compatible = "abracon,ab1804", |
---|
| 904 | + .data = (void *)AB1804 |
---|
| 905 | + }, |
---|
| 906 | + { |
---|
| 907 | + .compatible = "abracon,ab1805", |
---|
| 908 | + .data = (void *)AB1805 |
---|
| 909 | + }, |
---|
| 910 | + { |
---|
| 911 | + .compatible = "microcrystal,rv1805", |
---|
| 912 | + .data = (void *)RV1805 |
---|
| 913 | + }, |
---|
| 914 | + { } |
---|
| 915 | +}; |
---|
| 916 | +MODULE_DEVICE_TABLE(of, abx80x_of_match); |
---|
| 917 | +#endif |
---|
| 918 | + |
---|
677 | 919 | static struct i2c_driver abx80x_driver = { |
---|
678 | 920 | .driver = { |
---|
679 | 921 | .name = "rtc-abx80x", |
---|
| 922 | + .of_match_table = of_match_ptr(abx80x_of_match), |
---|
680 | 923 | }, |
---|
681 | 924 | .probe = abx80x_probe, |
---|
682 | | - .remove = abx80x_remove, |
---|
683 | 925 | .id_table = abx80x_id, |
---|
684 | 926 | }; |
---|
685 | 927 | |
---|
686 | 928 | module_i2c_driver(abx80x_driver); |
---|
687 | 929 | |
---|
688 | 930 | MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>"); |
---|
689 | | -MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@free-electrons.com>"); |
---|
| 931 | +MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>"); |
---|
690 | 932 | MODULE_DESCRIPTION("Abracon ABX80X RTC driver"); |
---|
691 | 933 | MODULE_LICENSE("GPL v2"); |
---|