add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/pwm/pwm-stm32.c
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@@ -12,12 +12,19 @@
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 #include <linux/mfd/stm32-timers.h>
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 #include <linux/module.h>
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 #include <linux/of.h>
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+#include <linux/pinctrl/consumer.h>
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 #include <linux/platform_device.h>
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 #include <linux/pwm.h>
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18
 
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 #define CCMR_CHANNEL_SHIFT 8
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 #define CCMR_CHANNEL_MASK  0xFF
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 #define MAX_BREAKINPUT 2
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+
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+struct stm32_breakinput {
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+	u32 index;
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+	u32 level;
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+	u32 filter;
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+};
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 struct stm32_pwm {
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 	struct pwm_chip chip;
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@@ -26,13 +33,9 @@
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 	struct regmap *regmap;
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 	u32 max_arr;
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 	bool have_complementary_output;
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+	struct stm32_breakinput breakinputs[MAX_BREAKINPUT];
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+	unsigned int num_breakinputs;
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 	u32 capture[4] ____cacheline_aligned; /* DMA'able buffer */
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-};
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-
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-struct stm32_breakinput {
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-	u32 index;
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-	u32 level;
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-	u32 filter;
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 };
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40
 
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 static inline struct stm32_pwm *to_stm32_pwm_dev(struct pwm_chip *chip)
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@@ -374,9 +377,7 @@
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 	else
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 		regmap_update_bits(priv->regmap, TIM_CCMR2, mask, ccmr);
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379
 
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-	regmap_update_bits(priv->regmap, TIM_BDTR,
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-			   TIM_BDTR_MOE | TIM_BDTR_AOE,
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-			   TIM_BDTR_MOE | TIM_BDTR_AOE);
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+	regmap_update_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE, TIM_BDTR_MOE);
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381
 
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 	return 0;
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 }
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@@ -440,7 +441,7 @@
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 }
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 static int stm32_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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-			   struct pwm_state *state)
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+			   const struct pwm_state *state)
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 {
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 	bool enabled;
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 	struct stm32_pwm *priv = to_stm32_pwm_dev(chip);
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@@ -468,7 +469,7 @@
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 }
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470
 
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 static int stm32_pwm_apply_locked(struct pwm_chip *chip, struct pwm_device *pwm,
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-				  struct pwm_state *state)
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+				  const struct pwm_state *state)
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 {
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 	struct stm32_pwm *priv = to_stm32_pwm_dev(chip);
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 	int ret;
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@@ -488,22 +489,19 @@
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 };
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 static int stm32_pwm_set_breakinput(struct stm32_pwm *priv,
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-				    int index, int level, int filter)
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+				    const struct stm32_breakinput *bi)
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 {
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-	u32 bke = (index == 0) ? TIM_BDTR_BKE : TIM_BDTR_BK2E;
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-	int shift = (index == 0) ? TIM_BDTR_BKF_SHIFT : TIM_BDTR_BK2F_SHIFT;
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-	u32 mask = (index == 0) ? TIM_BDTR_BKE | TIM_BDTR_BKP | TIM_BDTR_BKF
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-				: TIM_BDTR_BK2E | TIM_BDTR_BK2P | TIM_BDTR_BK2F;
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-	u32 bdtr = bke;
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+	u32 shift = TIM_BDTR_BKF_SHIFT(bi->index);
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+	u32 bke = TIM_BDTR_BKE(bi->index);
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+	u32 bkp = TIM_BDTR_BKP(bi->index);
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+	u32 bkf = TIM_BDTR_BKF(bi->index);
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+	u32 mask = bkf | bkp | bke;
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+	u32 bdtr;
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-	/*
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-	 * The both bits could be set since only one will be wrote
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-	 * due to mask value.
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-	 */
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-	if (level)
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-		bdtr |= TIM_BDTR_BKP | TIM_BDTR_BK2P;
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+	bdtr = (bi->filter & TIM_BDTR_BKF_MASK) << shift | bke;
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-	bdtr |= (filter & TIM_BDTR_BKF_MASK) << shift;
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+	if (bi->level)
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+		bdtr |= bkp;
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505
 
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 	regmap_update_bits(priv->regmap, TIM_BDTR, mask, bdtr);
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@@ -512,11 +510,25 @@
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 	return (bdtr & bke) ? 0 : -EINVAL;
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 }
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512
 
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-static int stm32_pwm_apply_breakinputs(struct stm32_pwm *priv,
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+static int stm32_pwm_apply_breakinputs(struct stm32_pwm *priv)
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+{
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+	unsigned int i;
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+	int ret;
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+
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+	for (i = 0; i < priv->num_breakinputs; i++) {
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+		ret = stm32_pwm_set_breakinput(priv, &priv->breakinputs[i]);
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+		if (ret < 0)
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+			return ret;
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+	}
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+
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+	return 0;
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+}
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+
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+static int stm32_pwm_probe_breakinputs(struct stm32_pwm *priv,
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 				       struct device_node *np)
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 {
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-	struct stm32_breakinput breakinput[MAX_BREAKINPUT];
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-	int nb, ret, i, array_size;
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+	int nb, ret, array_size;
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+	unsigned int i;
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 	nb = of_property_count_elems_of_size(np, "st,breakinput",
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 					     sizeof(struct stm32_breakinput));
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@@ -531,20 +543,21 @@
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 	if (nb > MAX_BREAKINPUT)
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 		return -EINVAL;
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+	priv->num_breakinputs = nb;
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 	array_size = nb * sizeof(struct stm32_breakinput) / sizeof(u32);
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 	ret = of_property_read_u32_array(np, "st,breakinput",
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-					 (u32 *)breakinput, array_size);
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+					 (u32 *)priv->breakinputs, array_size);
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 	if (ret)
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 		return ret;
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-	for (i = 0; i < nb && !ret; i++) {
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-		ret = stm32_pwm_set_breakinput(priv,
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-					       breakinput[i].index,
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-					       breakinput[i].level,
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-					       breakinput[i].filter);
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+	for (i = 0; i < priv->num_breakinputs; i++) {
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+		if (priv->breakinputs[i].index > 1 ||
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+		    priv->breakinputs[i].level > 1 ||
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+		    priv->breakinputs[i].filter > 15)
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+			return -EINVAL;
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 	}
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-	return ret;
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+	return stm32_pwm_apply_breakinputs(priv);
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 }
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 static void stm32_pwm_detect_complementary(struct stm32_pwm *priv)
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@@ -608,11 +621,13 @@
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 	priv->regmap = ddata->regmap;
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 	priv->clk = ddata->clk;
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 	priv->max_arr = ddata->max_arr;
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+	priv->chip.of_xlate = of_pwm_xlate_with_flags;
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+	priv->chip.of_pwm_n_cells = 3;
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 	if (!priv->regmap || !priv->clk)
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 		return -EINVAL;
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629
 
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-	ret = stm32_pwm_apply_breakinputs(priv, np);
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+	ret = stm32_pwm_probe_breakinputs(priv, np);
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 	if (ret)
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 		return ret;
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..
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@@ -645,6 +660,42 @@
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 	return 0;
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 }
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+static int __maybe_unused stm32_pwm_suspend(struct device *dev)
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+{
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+	struct stm32_pwm *priv = dev_get_drvdata(dev);
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+	unsigned int i;
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+	u32 ccer, mask;
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+
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+	/* Look for active channels */
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+	ccer = active_channels(priv);
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+
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+	for (i = 0; i < priv->chip.npwm; i++) {
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+		mask = TIM_CCER_CC1E << (i * 4);
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+		if (ccer & mask) {
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+			dev_err(dev, "PWM %u still in use by consumer %s\n",
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+				i, priv->chip.pwms[i].label);
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+			return -EBUSY;
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+		}
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+	}
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+
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+	return pinctrl_pm_select_sleep_state(dev);
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+}
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+
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+static int __maybe_unused stm32_pwm_resume(struct device *dev)
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+{
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+	struct stm32_pwm *priv = dev_get_drvdata(dev);
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+	int ret;
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+
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+	ret = pinctrl_pm_select_default_state(dev);
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+	if (ret)
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+		return ret;
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+
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+	/* restore breakinput registers that may have been lost in low power */
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+	return stm32_pwm_apply_breakinputs(priv);
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+}
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+
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+static SIMPLE_DEV_PM_OPS(stm32_pwm_pm_ops, stm32_pwm_suspend, stm32_pwm_resume);
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+
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 static const struct of_device_id stm32_pwm_of_match[] = {
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 	{ .compatible = "st,stm32-pwm",	},
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 	{ /* end node */ },
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@@ -657,6 +708,7 @@
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 	.driver	= {
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 		.name = "stm32-pwm",
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 		.of_match_table = stm32_pwm_of_match,
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+		.pm = &stm32_pwm_pm_ops,
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 	},
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 };
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 module_platform_driver(stm32_pwm_driver);