.. | .. |
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13 | 13 | #include <linux/mfd/stm32-lptimer.h> |
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14 | 14 | #include <linux/module.h> |
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15 | 15 | #include <linux/of.h> |
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| 16 | +#include <linux/pinctrl/consumer.h> |
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16 | 17 | #include <linux/platform_device.h> |
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17 | 18 | #include <linux/pwm.h> |
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18 | 19 | |
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.. | .. |
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31 | 32 | #define STM32_LPTIM_MAX_PRESCALER 128 |
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32 | 33 | |
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33 | 34 | static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm, |
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34 | | - struct pwm_state *state) |
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| 35 | + const struct pwm_state *state) |
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35 | 36 | { |
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36 | 37 | struct stm32_pwm_lp *priv = to_stm32_pwm_lp(chip); |
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37 | 38 | unsigned long long prd, div, dty; |
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.. | .. |
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60 | 61 | do_div(div, NSEC_PER_SEC); |
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61 | 62 | if (!div) { |
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62 | 63 | /* Clock is too slow to achieve requested period. */ |
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63 | | - dev_dbg(priv->chip.dev, "Can't reach %u ns\n", state->period); |
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| 64 | + dev_dbg(priv->chip.dev, "Can't reach %llu ns\n", state->period); |
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64 | 65 | return -EINVAL; |
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65 | 66 | } |
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66 | 67 | |
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.. | .. |
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126 | 127 | |
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127 | 128 | /* ensure CMP & ARR registers are properly written */ |
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128 | 129 | ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val, |
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129 | | - (val & STM32_LPTIM_CMPOK_ARROK), |
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| 130 | + (val & STM32_LPTIM_CMPOK_ARROK) == STM32_LPTIM_CMPOK_ARROK, |
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130 | 131 | 100, 1000); |
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131 | 132 | if (ret) { |
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132 | 133 | dev_err(priv->chip.dev, "ARR/CMP registers write issue\n"); |
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.. | .. |
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227 | 228 | return pwmchip_remove(&priv->chip); |
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228 | 229 | } |
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229 | 230 | |
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| 231 | +static int __maybe_unused stm32_pwm_lp_suspend(struct device *dev) |
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| 232 | +{ |
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| 233 | + struct stm32_pwm_lp *priv = dev_get_drvdata(dev); |
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| 234 | + struct pwm_state state; |
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| 235 | + |
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| 236 | + pwm_get_state(&priv->chip.pwms[0], &state); |
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| 237 | + if (state.enabled) { |
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| 238 | + dev_err(dev, "The consumer didn't stop us (%s)\n", |
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| 239 | + priv->chip.pwms[0].label); |
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| 240 | + return -EBUSY; |
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| 241 | + } |
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| 242 | + |
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| 243 | + return pinctrl_pm_select_sleep_state(dev); |
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| 244 | +} |
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| 245 | + |
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| 246 | +static int __maybe_unused stm32_pwm_lp_resume(struct device *dev) |
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| 247 | +{ |
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| 248 | + return pinctrl_pm_select_default_state(dev); |
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| 249 | +} |
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| 250 | + |
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| 251 | +static SIMPLE_DEV_PM_OPS(stm32_pwm_lp_pm_ops, stm32_pwm_lp_suspend, |
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| 252 | + stm32_pwm_lp_resume); |
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| 253 | + |
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230 | 254 | static const struct of_device_id stm32_pwm_lp_of_match[] = { |
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231 | 255 | { .compatible = "st,stm32-pwm-lp", }, |
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232 | 256 | {}, |
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.. | .. |
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239 | 263 | .driver = { |
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240 | 264 | .name = "stm32-pwm-lp", |
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241 | 265 | .of_match_table = of_match_ptr(stm32_pwm_lp_of_match), |
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| 266 | + .pm = &stm32_pwm_lp_pm_ops, |
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242 | 267 | }, |
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243 | 268 | }; |
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244 | 269 | module_platform_driver(stm32_pwm_lp_driver); |
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