hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/pwm/pwm-meson.c
....@@ -147,12 +147,13 @@
147147 return err;
148148 }
149149
150
- return pwm_set_chip_data(pwm, channel);
150
+ return 0;
151151 }
152152
153153 static void meson_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
154154 {
155
- struct meson_pwm_channel *channel = pwm_get_chip_data(pwm);
155
+ struct meson_pwm *meson = to_meson_pwm(chip);
156
+ struct meson_pwm_channel *channel = &meson->channels[pwm->hwpwm];
156157
157158 if (channel)
158159 clk_disable_unprepare(channel->clk);
....@@ -161,13 +162,20 @@
161162 static int meson_pwm_calc(struct meson_pwm *meson, struct pwm_device *pwm,
162163 const struct pwm_state *state)
163164 {
164
- struct meson_pwm_channel *channel = pwm_get_chip_data(pwm);
165
- unsigned int duty, period, pre_div, cnt, duty_cnt;
165
+ struct meson_pwm_channel *channel = &meson->channels[pwm->hwpwm];
166
+ unsigned int pre_div, cnt, duty_cnt;
166167 unsigned long fin_freq;
168
+ u64 duty, period;
167169
168170 duty = state->duty_cycle;
169171 period = state->period;
170172
173
+ /*
174
+ * Note this is wrong. The result is an output wave that isn't really
175
+ * inverted and so is wrongly identified by .get_state as normal.
176
+ * Fixing this needs some care however as some machines might rely on
177
+ * this.
178
+ */
171179 if (state->polarity == PWM_POLARITY_INVERSED)
172180 duty = period - duty;
173181
....@@ -179,19 +187,19 @@
179187
180188 dev_dbg(meson->chip.dev, "fin_freq: %lu Hz\n", fin_freq);
181189
182
- pre_div = div64_u64(fin_freq * (u64)period, NSEC_PER_SEC * 0xffffLL);
190
+ pre_div = div64_u64(fin_freq * period, NSEC_PER_SEC * 0xffffLL);
183191 if (pre_div > MISC_CLK_DIV_MASK) {
184192 dev_err(meson->chip.dev, "unable to get period pre_div\n");
185193 return -EINVAL;
186194 }
187195
188
- cnt = div64_u64(fin_freq * (u64)period, NSEC_PER_SEC * (pre_div + 1));
196
+ cnt = div64_u64(fin_freq * period, NSEC_PER_SEC * (pre_div + 1));
189197 if (cnt > 0xffff) {
190198 dev_err(meson->chip.dev, "unable to get period cnt\n");
191199 return -EINVAL;
192200 }
193201
194
- dev_dbg(meson->chip.dev, "period=%u pre_div=%u cnt=%u\n", period,
202
+ dev_dbg(meson->chip.dev, "period=%llu pre_div=%u cnt=%u\n", period,
195203 pre_div, cnt);
196204
197205 if (duty == period) {
....@@ -204,14 +212,13 @@
204212 channel->lo = cnt;
205213 } else {
206214 /* Then check is we can have the duty with the same pre_div */
207
- duty_cnt = div64_u64(fin_freq * (u64)duty,
208
- NSEC_PER_SEC * (pre_div + 1));
215
+ duty_cnt = div64_u64(fin_freq * duty, NSEC_PER_SEC * (pre_div + 1));
209216 if (duty_cnt > 0xffff) {
210217 dev_err(meson->chip.dev, "unable to get duty cycle\n");
211218 return -EINVAL;
212219 }
213220
214
- dev_dbg(meson->chip.dev, "duty=%u pre_div=%u duty_cnt=%u\n",
221
+ dev_dbg(meson->chip.dev, "duty=%llu pre_div=%u duty_cnt=%u\n",
215222 duty, pre_div, duty_cnt);
216223
217224 channel->pre_div = pre_div;
....@@ -224,7 +231,7 @@
224231
225232 static void meson_pwm_enable(struct meson_pwm *meson, struct pwm_device *pwm)
226233 {
227
- struct meson_pwm_channel *channel = pwm_get_chip_data(pwm);
234
+ struct meson_pwm_channel *channel = &meson->channels[pwm->hwpwm];
228235 struct meson_pwm_channel_data *channel_data;
229236 unsigned long flags;
230237 u32 value;
....@@ -267,8 +274,8 @@
267274 static int meson_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
268275 const struct pwm_state *state)
269276 {
270
- struct meson_pwm_channel *channel = pwm_get_chip_data(pwm);
271277 struct meson_pwm *meson = to_meson_pwm(chip);
278
+ struct meson_pwm_channel *channel = &meson->channels[pwm->hwpwm];
272279 int err = 0;
273280
274281 if (!state)
....@@ -366,6 +373,7 @@
366373 state->period = 0;
367374 state->duty_cycle = 0;
368375 }
376
+ state->polarity = PWM_POLARITY_NORMAL;
369377 }
370378
371379 static const struct pwm_ops meson_pwm_ops = {
....@@ -417,7 +425,7 @@
417425 };
418426
419427 static const char * const pwm_axg_ao_parent_names[] = {
420
- "aoclk81", "xtal", "fclk_div4", "fclk_div5"
428
+ "xtal", "axg_ao_clk81", "fclk_div4", "fclk_div5"
421429 };
422430
423431 static const struct meson_pwm_data pwm_axg_ao_data = {
....@@ -426,7 +434,7 @@
426434 };
427435
428436 static const char * const pwm_g12a_ao_ab_parent_names[] = {
429
- "xtal", "aoclk81", "fclk_div4", "fclk_div5"
437
+ "xtal", "g12a_ao_clk81", "fclk_div4", "fclk_div5"
430438 };
431439
432440 static const struct meson_pwm_data pwm_g12a_ao_ab_data = {
....@@ -435,7 +443,7 @@
435443 };
436444
437445 static const char * const pwm_g12a_ao_cd_parent_names[] = {
438
- "xtal", "aoclk81",
446
+ "xtal", "g12a_ao_clk81",
439447 };
440448
441449 static const struct meson_pwm_data pwm_g12a_ao_cd_data = {